Partitioning a model into a plurality of independent partitions to be processed within a distributed environment
AssigneeInternational Business Machines Corporation
InventorsMarvin J. Rich, William K. Mellors, Soon I. Joe
Life of this patent
Estimating the term…
Abstract
A model is partitioned into a plurality of partitions to be processed by a selected number of processors. Since the partitions are substantially independent of one another, the policy employed in the mapping of the partitions to the processors is flexible. Further, in the case in which the model is a chip, at least a portion of the clock and maintenance logic of the chip is also partitioned and mapped to the selected number of processors.
Claims92
A method of partitioning a model, said method comprising:
- obtaining a model of an arbitrary size;
- and
- automatically partitioning, without user directive, the model into a plurality of partitions to be distributed across an arbitrary number of processors.
A method of partitioning a chip, said method comprising:
- partitioning functionality of a chip of an arbitrary size into multiple cones of logic;
- combining the multiple cones of logic into a plurality of partitions, wherein the plurality of partitions are provided without user directive;
- and
- mapping the plurality of partitions to an arbitrary number of processors.
A system of partitioning a model, said system comprising:
- a model of an arbitrary size;
- and
- means for automatically partitioning, without user directive, the model into a plurality of partitions to be distributed across an arbitrary number of processors.
A system of partitioning a chip, said system comprising:
- means for partitioning functionality of a chip of an arbitrary size into multiple cones of logic;
- means for combining the multiple cones of logic into a plurality of partitions, wherein the plurality of partitions are provided without user directive;
- and
- means for mapping the plurality of partitions to an arbitrary number of processors.
A system of partitioning a model, said system comprising:
- a model of an arbitrary size;
- and
- at least one processor to automatically partition, without user directive, the model into a plurality of partitions to be distributed across an arbitrary number of processors.
A system of partitioning a chip, said system comprising:
- a chip of an arbitrary size;
- and
- at least one processor to partition functionality of the chip into multiple cones of logic, to combine the multiple cones of logic into a plurality of partitions, wherein the plurality of partitions are provided without user directive, and to map the plurality of partitions to an arbitrary number of processors.
At least one program storage device readable by a machine tangibly embodying at least one program of instructions executable by the machine to perform a method of partitioning a model, said method comprising:
- obtaining a model of an arbitrary size;
- and
- automatically partitioning, without user directive, the model into a plurality of partitions to be distributed across an arbitrary number of processors.
At least one program storage device readable by a machine tangibly embodying at least one program of instructions executable by the machine to perform a method of partitioning a chip, said method comprising:
- partitioning functionality of a chip of an arbitrary size into multiple cones of logic;
- combining the multiple cones of logic into a plurality of partitions, wherein the plurality of partitions are provided without user directive;
- and
- mapping the plurality of partitions to an arbitrary number of processors.
Dependencies are inferred from the claim text.