Input/output characterization chain for an integrated circuit
AssigneeLSI Logic Corporation
InventorsPeter Korger, Brian Schoner
Life of this patent
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Abstract
An input/output characterization register is provided for characterizing an integrated circuit input or output. The register includes a normal data input, a characterization data input, and a data latch having a latch control input, a latch data input and a latch data output. The normal data input and the characterization data input are multiplexed with the latch data output to the latch data input.
Claims16
A characterization register for characterizing an integrated circuit input or output, the register comprising:
- a data latch having a latch control input, a latch data input and a latch data output;
- and
- a normal data input and a characterization data input, which are multiplexed with the latch data output to the latch data input.
An output characterization circuit for characterizing an integrated circuit output, the circuit comprising:
- a first output pin;
- a first logic circuit on the integrated circuit;
- and
- a first plurality of characterization registers, wherein each register comprises a normal data input, a characterization data input, and a data latch having a latch control input, a latch data input and a latch data output which drives the first output pin through the first logic circuit, wherein the normal data input and the characterization data input are multiplexed with the latch data output to the latch data input, and wherein the first plurality of registers are coupled in a chain, with the latch data output of each register being coupled to the characterization data input of the next register in the chain.
An input characterization circuit for characterizing inputs to an integrated circuit, the circuit comprising:
- a first plurality of input pins;
- a logic circuit;
- and
- a first input characterization register comprising a normal data input which is driven by the first plurality of input pins through the logic circuit, a characterization data input, and a data latch having a latch control input, a latch data input and a latch data output, wherein the normal data input and the characterization data input are multiplexed with the latch data output to the latch data input.
Dependencies are inferred from the claim text.