Method and apparatus for increasing flash ROM programming performance in a multiple processor computer system
AssigneeHewlett-Packard Development Company, L.P.
InventorsDavid L. Collins, Steven Ray Dupree
Life of this patent
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Abstract
The disclosed embodiments provide an efficient method and apparatus for reprogramming flash memory in a multiprocessor computer system. A bootstrap processor (BSP) partitions portions of an image to be programmed into the flash memory and may divide those portions amongst itself and one or-more application processors (APs) for reprogramming.
Claims20
A computer system, comprising:
- a processor complex having a plurality of processors;
- a system memory accessible by at least one of the plurality of processors;
- a system BIOS adapted to rendezvous the plurality of processors to a common memory location in the system memory and designate one of the processors as a bootstrap processor;
- a non-volatile memory device adapted to be accessible to the plurality of processors;
- wherein the bootstrap processor is adapted to:
- program the non-volatile memory device by partitioning an image to be programmed into the non-volatile memory device into segments;
- divide the segments amongst one or more of the plurality of processors, each of the one or more of the plurality of processors being assigned to program a portion of the nonvolatile memory device corresponding to its respective segment;
- and
- monitor the progress of the one or more of the plurality of processors to determine when the programming of the non-volatile memory device is completed.
A method of programming a non-volatile memory device associated with a multiprocessor computer system, the method comprising the acts of:
- determining whether the non-volatile memory device is to be reprogrammed;
- responsive to the act of determining, partitioning an image to be programmed into the non-volatile memory device into segments;
- dividing the segments amongst one or more of the plurality of processors;
- assigning at least one of the one or more of the plurality of processors to program a portion of the non-volatile memory device corresponding to its respective segment;
- and
- monitoring the progress of the one or more of the plurality of processors to determine when the programming of the non-volatile memory device is completed.
A system BIOS for a multiprocessor computer system having a plurality of processors, a system memory that is accessible by at least one of the plurality of processors and a non-volatile memory device adapted to be accessible to the plurality of processors, the system BIOS being adapted to:
- rendezvous the plurality of processors to a common memory location in the system memory;
- designate one of the processors as a bootstrap processor;
- control the bootstrap processor to program the non-volatile memory device by partitioning an image to be programmed into the non-volatile memory device into segments;
- control the bootstrap processor to divide the segments amongst one or more of the plurality of processors;
- control the bootstrap processor to assign at least one of the one or more of the plurality of processors to program a portion of the non-volatile memory device corresponding to its respective segment;
- and
- control the bootstrap processor to monitor the progress of the one or more of the plurality of processors to determine when the programming of the non-volatile memory device is completed.
Dependencies are inferred from the claim text.