Wafer scale thin film package

A chip package comprising:

• a flexible redistribution thin film having multiple layers of redistribution metallurgy for redistributing power and signals from chip to substrate and providing sufficient elasticity to relieve stresses caused by thermal mismatch between chip and substrate, said thin film having formed thereon a pattern of connection pads on one surface matching the pattern of connection pads on said substrate;
• a pattern of connection points formed on the other surface of said thin film matching the pattern of connection pads on said chip with respective ones of said pads on said chip electrically connected to respective ones of said connection points on said other surface and said thin film and chip attached to one another so as to form a chip module;
• and
• a substrate for said chip having a pattern of connection pads matching the pattern of connection pads on said one surface of said thin film with corresponding pads in each of said patterns electrically connected to one another.

A method of forming a chip module comprising:

• forming a flexible redistribution thin film having multiple layers of redistribution metallurgy on a temporary substrate;
• forming an array of pads on one surface of said thin film matching the array of pads on said chip;
• forming another array of pads on the other surface of said thin film matching the array of pads on the substrate to which it will be attached for packaging;
• attaching said chip pads to the respective pads on said one surface of said thin film;
• and
• removing said thin film and chip from said temporary substrate to thereby form said module.

A wafer scale method of forming chip modules, comprising:

• forming a flexible redistribution thin film directly on a wafer by depositing alternate layers of a flexible insulating material and conductive metallurgy;
• and
• forming metal filled vias in said layer flexible insulating material to interconnect said layers of metallurgy to one another and to connection pads on said chip so as to form a power and signal redistribution thin film for said chip and;
• forming vias in the final layer of insulating material having a pattern matching the pattern of the substrate to which it is to be attached;
• forming a pattern of pads on said vias in said final layer of insulating material;
• and
• dicing said wafer to form chip modules ready for packaging.

A wafer scale method of forming chip modules, having flexible thin film redistribution layer thereon comprising:

• depositing a thin layer of insulating material directly on said wafer;
• forming vias in said layer of insulating material to the chip electrical contacts on said wafer;
• filling said vias with a conductive material:
• forming a metallurgical pattern on said thin layer of insulating material and in contact with said conductive material of said vias;
• alternating said steps of forming layers of insulating material with metal filled vias and forming said metallurgical patterns on said layer of insulating material to thereby form a selected redistribution pattern for chip signal and power redistribution;
• forming a pattern of metal filled vias in the final layer of insulating material matching the pattern of contact pads on the substrate to which said chip modules will be attached;
• forming pads on said metal filled vias of said final layer of insulating material;
• and
• dicing said wafer to form said chip modules.