Fractional-N frequency synthesizer and method

A fractional-N frequency synthesizer, comprising:

• a phase-locked-loop (PLL) circuit comprising:
• a phase detector having a first input connected to receive a reference frequency and a second input and which produces an output which varies with the phase difference between the signals received at said first and second inputs,
• a loop filter which filters said phase detector output,
• a multi-phase voltage-controlled oscillator (VCO) which receives said filtered phase detector output and outputs a plurality of waveforms having a common frequency which varies with said filtered phase detector output, the phases of said plurality of VCO output waveforms differing with respect to each other, at least one of said plurality of VCO output waveforms providing said fractional-N frequency synthesizer's output, and a multi-phase frequency divider which comprises:
• a programmable multi-modulus divider which divides a selected one of said plurality of VCO waveforms with a multi-modulus division ratio which varies in response to a modulus control signal and provides said divided waveform at an output,
• a plurality of D-latches, each of which receives said multi-modulus divider output at its D input and a respective one of said plurality of VCO output waveforms at its clock input and which produce a plurality of delayed multi-modulus divider outputs at their respective Q outputs, each of said delayed multi-modulus divider outputs having respective phases, each of which corresponds with a respective one of said VCO output phases, and
• a phase selector which provides a selected one of said latch outputs to the second input of said phase detector in response to a phase control signal such that said multi-phase frequency divider provides a fractional-N division ratio,
• a controller which provides said modulus control signal and said phase control signal to achieve a desired fractional-N division ratio (DR) which is given by:
• DR=(x+Y)−Z,
• where X is equal to the multi-modulus division ratio, Y is equal to the current phase, and Z is equal to the previous phase, and
• a ΔΣ modulator arranged to randomize the modulus and phase control signals produced by said controller to randomize and thereby reduce phase mismatch error which might otherwise be present in said fractional-N frequency synthesizer's output and to enable the synthesis of frequencies with finer resolution than would be possible without the use of said modulator.

A method of synthesizing a frequency, comprising:

• generating a first output which varies with the phase difference between a reference signal and a second signal,
• generating a plurality of oscillating waveforms, each of which has a common frequency that varies with said first output, said oscillating waveforms having phases which differ with respect to each other, at least one of said oscillating waveforms being the synthesized frequency output,
• dividing down a respective one of said oscillating waveforms with a multi-modulus division ratio which varies in response to a modulus control signal, delaying said divided down output to produce a
• plurality of divided outputs having respective phases, each of said which corresponds with a respective one of said phases of said oscillating waveforms,
• selecting a respective one of said divided outputs in response to a phase control signal, said selected divided output being said second signal,
• providing said modulus control signal and said phase control signal such that the frequency of said second signal is equal to that of said common frequency divided down with a desired fractional-N division ratio, and
• randomizing said modulus and phase control signals to randomize and thereby reduce phase mismatch error which might otherwise be present in said synthesized frequency output and to enable the synthesis of frequencies with finer resolution than would be possible without the use of said randomization.