Voltage detection circuit and method for semiconductor memory devices

#1. Technical Field of the Invention

#The present invention relates to voltage detection circuitry, and particularly to detecting intermediate reference voltages utilized by memory devices during memory access operations.

#2. Description of the Related Art

#A more complete understanding of the system and method of the present invention may be obtained by reference to the following Detailed Description when taken in conjunction with the accompanying Drawings wherein:

#FIG. 1 is a schematic diagram of a detection circuit according to an exemplary embodiment of the present invention;

#FIG. 2 is a schematic diagram of a Schmitt trigger circuit shown in FIG. 1;

#The present invention will now be described more fully hereinafter with reference to the accompanying drawings in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, the embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

#Referring to FIG. 1, there is shown a detection circuit 1 according to an exemplary embodiment of the present invention. Detection circuit 1 is capable of monitoring the voltage level of a signal and detecting the voltage level no longer being within a predetermined range of voltage levels. Detection circuit 1 may be used in a memory device, such as a dynamic random access memory device, to monitor voltage levels of voltage generator circuitry employed to precharge bit lines of the memory device, charge a plate of memory cell capacitors and/or store a voltage level in reference memory cells. It is understood, however, that detection circuit 1 may be used to monitor voltage levels generated within other integrated circuits, such as nonvolatile memory devices.

#Detection circuit 1 may include a pair of Schmitt trigger circuits 2. An input of each Schmitt trigger circuit 2 may be coupled to the signal to be monitored. A first Schmitt trigger circuit 2A may be adapted to detect whether an input to detection circuit 1 falls below a minimum threshold voltage level. A second Schmitt trigger circuit 2B may be adapted to detect whether the input to detection circuit 1 rises above a maximum threshold voltage level. In this way, a desired range of voltage levels may be defined between maximum and minimum threshold voltage levels such that first and second Schmitt trigger circuits 2 detect when the input of detection circuit 1 is no longer within the desired voltage range.