Multi-chip module and fabricating method thereof

#The present invention relates to multi-chip modules and fabricating methods thereof, and more particularly, to a multi-chip module and a fabricating method thereof, in which two or more semiconductor chips are integrated in one single package unit for offering manifold increase in functionality or data storage capacity.

#Multi-chip module technology allows two or more semiconductor chips to be integrated in one single package unit and then connected to a printed circuit board for forming a multi-chip module, which is capable of offering a manifold level of functionality or data storage capacity. Similarly, a general memory module, such as a flash memory module, typically has two or more memory chips integrated in one single memory module for providing significant increase in data storage capacity.

#Illustrated in FIG. 1 and FIG. 2 are two conventional multi-chip modules Referring to FIG. 1, a conventional multi-chip module is constructed based on a stacked dual-chip BGA (Ball Grid Array) semiconductor package, including: (a) a substrate 100; (b) a first semiconductor chip 110 mounted on the substrate 100; (c) a second semiconductor chip 120 stacked on the first semiconductor chip 110, (d) a set of first bonding wires 131 for electrically connecting the first semiconductor chip 110 to the substrate 100; (e) a set of second bonding wires 132 for electrically connecting the second semiconductor chip 120 to the substrate 100; (f) an encapsulant 140 for encapsulating the two semiconductor chips 110, 120; and (g) ball grid array 150 implanted on a back side of the substrate 100 for mechanically bonding and electrically connecting the BGA package to a printed circuit board (PCB) 160. After the BGA package is mounted on the PCB 160, a plurality of passive components 170 are further bonded to predetermined positions on the PCB 160 beside the BGA package. This results in a dual-chip module.

#The invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawings, wherein:

#FIG. 1 (PRIOR ART) is schematic sectional diagram of a conventional multi-chip module, FIG. 2 (PRIOR ART) is a schematic sectional diagram of another conventional multi-chip module; and

#FIGS. 3A-3C are schematic sectional diagrams used to depict the steps involved in the fabricating method of the multi-chip module of the invention.

#Illustrated in FIGS. 3A-3B are the steps involved in the fabricating method of the multi-chip module of one preferred embodiment according to the invention. In this embodiment, fabrication of a triple-chip module of the invention is demonstrated; however, it is to be noted that the invention can also be used to fabricate a dual-chip module or a multi-chip module having four or more semiconductor chips.

#Referring first to FIG. 3A, as fabrication of a triple-chip module is illustrated in this embodiment, the first step of the fabricating method is to prepare three semiconductor chips, including a first semiconductor chip 310, a second semiconductor chip 320, and a third semiconductor chip 330.

#The first semiconductor chip 310 has an active surface 310a and an inactive surface 310b, while the active surface 310a is partitioned into three regions. a first connecting region R1, a second connecting region R2, and a third connecting region R3. Further, on the active surface 310a there are formed a plurality of input/output (I/O) pads, including a first set of I/O pads 311a disposed in the first connecting region R1, a second set of I/O pads 311b disposed in the second connecting region R2, and a third set of I/O pads 311c disposed in the third connecting region R3 Moreover, on the first set of I/O pads 311a there are mounted a plurality of solder bumps 312 used for subsequent flip-chip application. It is to be noted that the three connecting areas R1, R2, R3 are defined on the active surface 310a of the first semiconductor chip 310 in correspondence with the triple-chip module being fabricated in this embodiment. However, the invention can further be applied to a multi-chip module containing two, four or more chips, depending on the area size of the first semiconductor chip 310.