US 2003/0197551 A1 · Potential generating circuit capable of correctly controlling output potential

Abstract

An internal power supply potential generating circuit includes: a control potential generating circuit having four MOS transistors connected in series between a node and a ground potential line, and controlling a pull-up transistor and a pull-down transistor in order that a potential at an output node coincides with a control potential; a monitor potential generating circuit having four MOS transistors connected in series between a prescribed node and a ground potential line, and generating a monitor potential; a potential dividing circuit generating a potential 1/2 times a reference potential; and a VCC1 generating circuit controlling a potential at the prescribed potential in order that the monitor potential becomes the reference potential. Therefore, an output potential can be controlled with correctness.

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Claims16

Dependent claims

A potential generating circuit in which charging and discharging of an output node are performed in order that a potential at said output node becomes a potential corresponding to a reference potential, comprising:

a first transistor of a first conductive type, a first electrode of which is connected to a line at a first power supply potential, and a second electrode of which is connected to said output node;
a second transistor of a second conductive type, a first electrode of which is connected to a line at a second power supply potential, and a second electrode of which is connected to said output node;
a control potential generating circuit including:
a third transistor of the second conductive type, a first electrode of which is connected to a first node, an input electrode of which is connected to said output node, and a second electrode of which is connected to an input electrode of said first transistor;
a fourth transistor of the first conductive type, a first electrode of which is connected to the line at said second power supply potential, an input electrode of which is connected to said output node, and a second electrode of which is connected to an input electrode of said second transistor;
and first and second diode elements connected in series between said second electrodes of said third and fourth transistors, wherein said first and second transistors are controlled in order that a potential at said output node coincides with a potential at a second node between said first and second diode elements;
a monitor potential generating circuit including:
a fifth transistor of the second conductive type, a first electrode of which is connected to said first node and an input electrode of which is connected to a third node;
a sixth transistor of the first conductive type, a first electrode of which is connected to the line at said second power supply potential, and an input electrode of which is connected to said third node;
a third diode element connected between a second electrode of said fifth transistor and said third node;
and a fourth diode element connected between said third node and a second electrode of said sixth transistor, wherein a monitor potential is outputted from said third node;
and
a current supply circuit supplying a current to said first node in order that said monitor potential coincides with said reference potential.

10 more elements

A potential generating circuit in which charging and discharging of an output node are performed in order that a potential at said output node becomes a potential corresponding to a reference potential, comprising:

a first comparison circuit, including first and second transistors, input electrodes of which receive said reference potential and the potential at said output node, respectively, and outputting a first signal at a level corresponding to a potential difference between the potential at said output node and a lower limit potential lower than said reference potential by a first offset voltage;
a second comparison circuit including third and fourth transistors, input electrodes of which receive said reference potential and the potential at said output node, respectively, and outputting a second signal at a level corresponding to a potential difference between the potential at said output node and an upper limit potential higher than said reference potential by a second offset voltage;
and
a drive circuit, operating in response to said first and second signals from said first and second comparison circuits, and causing a current to flow into said output node when the potential at said output node is lower than said lower limit potential, while when the potential at said output node is higher than said lower limit potential, causing a current to flow out from said output node.

1 more element

Dependencies are inferred from the claim text.

Description9,677 words

Summary1,669 words

#1. Field of the Invention

#The present invention relates to a potential generating circuit, and particularly to a potential generating circuit charging and discharging an output node in order that a potential of the output node becomes a potential corresponding to a reference potential.

#2. Description of the Background Art

Brief description of the drawings23 figures

#FIG. 1 is a circuit diagram showing a configuration of an internal power supply potential generating circuit according to a first embodiment of the present invention;

#FIG. 2 is a circuit block diagram showing a modification example of the first embodiment;

#FIG. 3 is a circuit diagram showing another modification example of the first embodiment;

Detailed description7,602 words

#First Embodiment

#FIG. 1 is a circuit diagram showing a configuration of an internal power supply potential generating circuit according to a first embodiment of the present invention. In FIG. 1, the internal power supply potential generating circuit includes: a potential dividing circuit 1, a VCC1 generating circuit, a monitor potential generating circuit 3; a control potential generating circuit 4; and a drive circuit 5.

#Potential dividing circuit 1 includes: N-channel MOS transistors 21 and 22 connected in series between a line at external power supply potential VCC0 and a line at ground potential GND. The gate of an N-channel MOS transistor 21 receives reference potential VR0. The gate of an N-channel MOS transistor 22 is connected to the drain thereof. The N-channel MOS transistor 22 constitutes a diode element. N-channel MOS transistors 21 and 22 are of the same transistor sizes (a channel width W and a channel length L) as each other. A potential VR1=VR0/2 1/2 times reference potential VR0 appears at a node between N-channel MOS transistors 21 and 22.

Potential generating circuit capable of correctly controlling output potential

Life of this patent

Potential generating circuit capable of correctly controlling output potential

Life of this patent

Life of this patent

Abstract

Drawings

Drawings

Claims16

Description9,677 words

Drawings

Classification2 codes

Life of this patent

Description9,677 words