Semiconductor integrated circuit device and microcomputer
AssigneeHitachi, Ltd.
InventorsHiroyuki Mizuno, Takahiro Nagano, Yoshinobu Nakagome
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AssigneeHitachi, Ltd.
InventorsHiroyuki Mizuno, Takahiro Nagano, Yoshinobu Nakagome
Estimating the term…
A semiconductor integrated circuit comprises a logic circuit which is formed of p-channel MIS transistors and n-channel MIS transistors, a first oscillation circuit of variable oscillation frequency which is formed of p-channel MIS transistors and n-channel MIS transistors, a control circuit which produces a control signal for controlling the threshold voltage of the p-channel and n-channel MIS transistors, and a second oscillation circuit which produces multiple reference clock signals of different frequencies depending on the operation mode. The control circuit receives a reference clock signal and controls the first oscillation circuit with the control signal so that the oscillation frequency of the first oscillation circuit is correspondent to the frequency of the reference clock signal.
A semiconductor integrated circuit comprising:
A semiconductor integrated circuit comprising:
A semiconductor integrated circuit comprising:
A semiconductor integrated circuit comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Backward citations are indexed for grants only.
Using field effect transistors only: programmable
Modifications for compensating variations of temperature, supply voltage or other physical parameters: in field effect transistor circuits
Pulse technique
Term end not estimated
The present invention relates to a semiconductor integrated circuit, and particularly to a semiconductor integrated circuit device and microcomputer that are intended for fast and low-voltage operation, and to a microcomputer system based on this microcomputer.
In order for a MOS transistor to operate at a low voltage around 1 V, it must have a lower threshold voltage for the enhancement of driving ability and operation speed. However, when the threshold voltage is set too low, the MOS transistor cannot turn off completely due to its subthreshold characteristics (tailing characteristics), causing a subthreshold leakage current to flow, resulting in an increased power consumption, as described in publication “1993 Symposium on VLSI Circuits Digest of Technical Papers”, pp. 45-46 (May 1993).
As the sub-micron MOS transistor pattern design advances, the variation among devices of the fundamental characteristics including the threshold voltage attributable to the unequality of manufacturing process increases, as described in publication “1994 Symposium on VLSI Circuits Digest of Technical Papers”, pp. 13-14 (June 1994).
FIG. 1 is a block diagram of the semiconductor integrated circuit based on an embodiment of this invention;
FIG. 2 is a block diagram of the semiconductor integrated circuit based on another embodiment of this invention;
FIG. 3 is a block diagram of the semiconductor integrated circuit based on still another embodiment of this invention;
The embodiments this invention will be explained in detail with reference to the drawings.
FIG. 1 shows the first embodiment of this invention, in which the semiconductor integrated circuit device includes a main circuit LOG0 such as a logic circuit, a variable-frequency oscillation circuit OSC0, and a control circuit CNT0.
The oscillation circuit OSC0 receives a control signal B1 from the control circuit CNT0 and has its oscillation frequency dependent on the value of the control signal B1. The control circuit CNT0 receives an external clock signal CLK0 and the oscillation output S0 of the oscillation circuit OSC0, and produces control signals B0 and B1 that are proportional to the difference of frequency between the external clock signal CLK0 and oscillation output S0. The control signal B0 is fed to the main circuit LOG0, while the control signal B1 is fed to the oscillation circuit OSC0.