Semiconductor circuit and initialization method

#Field of the Invention

#The invention relates to a semiconductor circuit having a multiplicity of fuses for setting internal operating parameters and hardware properties of the semiconductor circuit, and to a method for the optimized read-out of fuses.

#Due to varying production conditions, integrated semiconductor circuits often have defectively produced structures that can restrict the functionality of the entire semiconductor chip. Thus, e.g. internal voltages do not reach the designated value on account of altered electrical properties of the structures, or lines such as e.g. word and bit lines may be defective.

#FIG. 1 is a circuit block diagram of a read-out device for reading out a fuse with a comparator, a pulse shaper circuit and a read-out circuit according to the prior art;

#FIG. 2 is a circuit block diagram of two read-out devices for reading out a generator fuse and a redundancy fuse according to the invention;

#FIG. 3A is a circuit diagram of a comparator for reading out a generator fuse according to the prior art;

#In all the figures of the drawing, sub-features and integral parts that correspond to one another bear the same reference symbol in each case. Referring now to the figures of the drawing in detail and first, particularly, to FIG. 1 thereof, there is shown diagrammatically the construction of a conventional read-out device E for reading out a fuse F of an electronic semiconductor circuit. In this case, the read-out device E contains a comparator K for determining the read-out instant, a pulse shaper circuit P for generating control signals, and also a read-out circuit L for reading out the corresponding fuse F. In this case, an output of the comparator K is connected to an input of the pulse shaper circuit P via a signal line, while an output of the pulse shaper P is connected to an input of the read-out circuit L via a control line.

#FIG. 2 diagrammatically shows a configuration of two read-out devices ER, EG for reading out a generator fuse and a redundancy fuse FG, FR of a semiconductor circuit. In each case only the comparator KG, KR and the pulse shaper circuit PG, PR of the respective read-out devices EG, ER are illustrated here.

#In this case, the first comparator KG is preferably of conventional design and generates a first start signal start1 at a specific instant during an initialization phase of the semiconductor circuit. The start1 signal causes the first pulse shaper circuit PG to generate two control signals bFPUP, FPUN1 at two of its outputs.