Load-driving semiconductor device
AssigneeDenso Corporation
InventorHiroshi Imai
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AssigneeDenso Corporation
InventorHiroshi Imai
Estimating the term…
In a composite IC in which integrated are a power transistor, a bipolar analog circuit and a MOS logic circuit, a load-driving semiconductor device is provided which is capable of certainly placing the power transistor into an off-condition at power-on for stopping the driving of a load. In the semiconductor device, a high-side switch MOS transistor, a charge pump, a bipolar analog circuit, a charge pump driving CMOS logic circuit, a level conversion CMOS logic circuit and a forcibly stopping bipolar transistor 90 are made in the form of an IC, and the forcibly stopping bipolar transistor receives, through its base terminal, a signal which inverts when a drive voltage exceeds a predetermined value to turn to an on-condition. This operation places the bipolar analog circuit into a driving-stopped condition.
A load-driving semiconductor device comprising:
A load-driving semiconductor device comprising:
A load-driving semiconductor device comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Backward citations are indexed for grants only.
By feedback from the output to the control circuit: in field-effect transistor switches
By measures taken in the control circuit: in field-effect transistor switches
Modifications for ensuring a fully conducting state: in field-effect transistor switches
Modifications for ensuring a predetermined initial state when the supply voltage has been applied: in field-effect transistor switches
Term end not estimated
1) Field of the Invention
The present invention relates to a semiconductor device for driving a load.
2) Description of the Related Art
Other objects and features of the present invention will become more readily apparent from the following detailed description of the preferred embodiments taken in conjunction with the accompanying drawings in which:
FIG. 1 is an illustration of an arrangement of a load-driving circuit;
FIG. 2 is an illustration of arrangements of a gate driving circuit and peripheral circuits according to an embodiment of the present invention;
An embodiment of the present invention will be described hereinbelow with reference to the drawings.
Referring to FIG. 1, the entire arrangement of a load-driving circuit (device) according to the embodiment of the invention will be described hereinbelow.
In FIG. 1, the positive terminal of a power supply (battery) 1 is connected through a switch SW1 to the drain terminal of a power MOS transistor (N-channel MOS) 3. The rated voltage VB of the power supply (battery) 1 is set at 14 volts. The source terminal of the power MOS transistor 3 is connected through a load 2 to the ground. In this way, between the power supply 1 and the ground, the power MOS transistor 3 is connected in series to the load 2 to be placed on the power supply side so that the power MOS transistor 3 is used as a high-side switch.