Apparatus for comparing an input voltage with a threshold voltage

#The present invention is directed to apparatuses for comparing an input voltage with a reference or threshold voltage. Such apparatuses are sometimes referred to as comparators. The present invention is preferably embodied in a bandgap comparator apparatus that compares an input voltage with an inherent threshold voltage presented, or established by the apparatus.

#A bandgap comparator generates a digital output that transitions high when an input voltage exceeds an internally generated reference or threshold voltage. One problem with typical prior art bandgap comparator apparatuses is that they draw excessive current when the input voltage exceeds the threshold voltage.

#There is a need for an apparatus for comparing an input voltage with a threshold voltage, such as a bandgap comparator, that reduces current drain without compromising accuracy of comparator thresholds.

#FIG. 1 is an electrical schematic diagram of a representative prior art comparator apparatus.

#FIG. 2 is an electrical schematic diagram of a comparator apparatus constructed according to the teachings of the present invention.

#FIG. 3 is an electrical schematic diagram of a second embodiment of a comparator apparatus constructed according to the teachings of the present invention.

#FIG. 1 is an electrical schematic diagram of a representative prior art comparator apparatus. In FIG. 1, a prior art comparator apparatus 10 is based upon a Brokaw bandgap cell, as generally described in “A Simple Three-Terminal IC Bandgap Reference,” by A. Paul Brokaw; IEEE Journal of Solid-State Circuits; December 1974; pp. 388-393. Comparator apparatus 10 includes a first current mirror 12, a second current mirror 14 and a third current mirror 16. First current mirror 12 includes metal oxide semiconductor (MOS) transistors M1, M2; second current mirror 14 includes MOS transistors M3, M4; and third current mirror 16 includes MOS transistors M5, M6. MOS transistor M1 has a source 20, a gate 22 and a drain 24. MOS transistor M2 has a source 26, a gate 28 and a drain 30. MOS transistor M2 has gate 28 coupled with drain 30 to establish the MOS transistor pair M1, M2 as current mirror 12.

#MOS transistor M3 has a source 32, a gate 34 and a drain 36. MOS transistor M4 has a source 38, a gate 40 and a drain 42. MOS transistor M3 has gate 34 coupled with drain 36 to establish the MOS transistor pair M3, M4 as current mirror 14.

#MOS transistor M5 has a source 44, a gate 46 and a drain 48. MOS transistor M6 has a source 50, a gate 52 and a drain 54. MOS transistor M5 has gate 46 coupled with drain 48 to establish the MOS transistor pair M5, M6 as current mirror 16. Drain 24 is coupled with drain 48. Drain 42 is coupled with drain 54. A supply voltage VCC is provided at a supply locus 56 that is coupled with sources 20, 26, 32, 38. Source 44 is coupled with ground 82. Source 50 is coupled with ground 84.