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AssigneeSamsung Electronics Co., Ltd.
InventorsHo-Young Song, Seong-Jin Jang
Estimating the term…
Provided are an on-chip termination apparatus in a semiconductor integrated circuit, and a method for controlling the same. The on-chip termination apparatus is installed in a semiconductor integrated circuit that has an output driver for outputting data to the outside via a pad and a data input circuit for receiving data from the outside via the pad. The on-chip termination apparatus includes an on-chip terminator including at least one terminal resistor electrically connected to the pad; and a terminator control circuit for turning on or off the on-chip terminator in response to an output enable signal that enables or disables the data output circuit, wherein the terminator control circuit turns off the on-chip terminator in the event that the data output circuit is enabled. Therefore, the on-chip termination apparatus is controlled by an output enable signal, thereby reducing timing loss, thus enabling a system to operate at high speed.
A semiconductor integrated circuit comprising:
An on-chip termination apparatus installed in a semiconductor integrated circuit including a data output circuit for outputting data to the outside of the semiconductor integrated circuit via a pad and a data input circuit for receiving data from the outside via the pad, the on-chip termination apparatus comprising:
A method for controlling an on-chip terminator in a semiconductor integrated circuit including the on-chip terminator that has at least one bi-directional data input/output unit, an output driver for transmitting output data to the outside of the semiconductor integrated circuit, and at least one terminal resistor, the method comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Backward citations are indexed for grants only.
Arrangements for coupling to transmission lines: arrangements for impedance matching
Using field effect transistors only: with a bidirectional operation
Digital communication
Pulse technique
Term end not estimated
This application claims priority to an application entitled “ON-CHIP TERMINATION APPARATUS IN SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD FOR CONTROLLING THE SAME” filed in the Korean Industrial Property Office on Apr. 19, 2002 and assigned Serial No. 2002-21684, the contents of which are hereby incorporated by reference.
1. Field of the Invention
The present invention relates to semiconductor integrated circuits, and more particularly, to an on-chip terminator that terminates a transmission line in a semiconductor integrated circuit, and a circuit and method for controlling the on-chip terminator.
The present invention will become more apparent by describing in detail-preferred embodiments thereof with reference to the attached drawings in which:
FIG. 1 is a circuit diagram of a semiconductor chip having a conventional on-chip terminator;
FIG. 2 is a circuit diagram of a semiconductor chip having an on-chip termination apparatus according to a first embodiment of the present invention;
For a better understanding of the present invention, before describing preferred embodiments of the invention with reference to the accompanying drawings, a concept of the present invention will be briefly described.
Several semiconductor chips are set to output or receive data via the same pin, that is, the same pin is shared by a plurality of semiconductor chips for input/output of data. Such a pin is called a bi-directional input/output pin. A semiconductor chip, which includes at least one bi-directional input/output pin (or a bi-directional input/output unit), requires an output enable signal OE for turning on an output driver only during output of data. In the present invention, an on-chip terminator is set to be turned on/off in response to the output enable signal OE used in a semiconductor chip having at least one bi-directional input/output unit.
FIG. 2 is a circuit diagram of a semiconductor chip 200 having an on-chip termination apparatus according to a first embodiment of the present invention. Referring to FIG. 2, the semiconductor chip 200 includes an on-chip terminator 210, a terminator control circuit 220, data output circuits 230 and 240, and a data input circuit 250.