Photomask for test wafers

#The present invention relates to technique for testing and manufacturing electronic devices such as semiconductor devices, electric circuit boards and CCD devices.

#Recently, in order to increase competitive power of products in a market, it is indispensable to shorten a development term of products. However, since it takes several tens of days from setting of products on a manufacturing line to complete test of electrical characteristics for judging whether products are good or not upon completion of the products, it is late even if a counter plan is considered after reception of the tested results of the electrical characteristics.

#In order to solve the above problem, there is a method that in development of products a common process is divided into blocks and electrical test is made in each block, so that its tested result is fed back to the process to establish the process of the block early. A sample for monitoring the block is named a test structure, a short loop monitor or a test element group (TEG). Hereinafter, these are named test structures generically. An example of the test structure is disclosed in “Integrated Circuit Manufacturability, IEEE PRESS, pp. 26-29”.

#FIGS. 1A and 1B show a test structure according to the present invention;

#FIG. 2 illustrates a method of detecting short-circuit defect;

#FIGS. 3A and 3B illustrate a method of locating short-circuit defect;

#Embodiments of the present invention are now described with reference to the accompanying drawings.

#FIGS. 1A and 1B show a test structure capable of detecting not only short-circuit defect but also open circuit defect. Although not shown, a plurality of test structures are disposed on the whole surface of a wafer or together with a chip constituting a final product and generally disposed together with a different test structure for performing another test such as test for defect in contact.

#First, a open circuit detection lead wire 1 having a desired width and length is disposed meandering in a first wiring layer. Probing electrodes 3 and 3′ are connected to both ends of the lead wire 1 so that a wiring resistance is electrically measured to confirm the presence of open circuit.