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US 2003/0197286 A1Published application
Flip-chip package containing a chip and a substrate having differing pitches for electrical connections
AssigneesCelerity Research Pte. Ltd., ASE Electronics (M) Sdn. Bhd.
InventorRobert M. Hilton
Life of this patent
Estimating the term…
Abstract
A flip-chip package uses a substrate having bond pad spacing that matches terminal spacing on a chip at an elevated temperature, such as the temperature of the chip during bonding to the substrate, the melting point of solder used on the chip, a temperature within the range of thermal cycling of the chip, or an operating temperature of the chip. Matching spacing at an elevated temperature permits a better alignment at the bonding temperature for formation of stronger bonds.
Claims14
A device comprising:
- a chip having a plurality of terminals;
- and
- a substrate having traces including a plurality of contact areas respectively corresponding to the plurality of terminals, wherein each terminal is electrically connected to the corresponding contact area, and wherein spacing of the contact areas on the substrate matches spacing of the terminals on the chip when the chip and substrate are at an elevated temperature.
A flip-chip package comprising:
- a chip having terminals with a first pitch at room temperature;
- and
- a substrate having conductive traces including contact areas respectively corresponding to the terminals, each terminal being directly attached to the corresponding contact area, wherein at room temperature, the contact areas have a second pitch that differs from the first pitch.
Dependencies are inferred from the claim text.