Array of flash memory cells and data program and erase methods of the same

A single transistor unit cell of an array of flash memory cells, said unit cell comprising:

• an insulator film including a low concentration silicon oxynitride film, a high concentration silicon oxynitride film and a low concentration silicon oxynitride film stacked over one portion of a semiconductor substrate;
• a gate electrode formed over said insulator film;
• and
• impurity diffusion regions formed in said semiconductor substrate on each side of said gate electrode.

A method to program an array of flash memory cells having a plurality of word lines, selection lines and bit lines respectively connected to each of gate, source and drain of a plurality of flash memory cells arranged in the form of a matrix and a well formed in each memory cell and wherein each memory cell comprises a single transistor, the method comprising:

• a) selecting a cell among said plurality of flash memory cells;
• b) applying a supply voltage Vcc to a word line connected to the gate of said selected cell;
• c) applying a voltage −Vpp to the selection and the word line connected to the source and drain of said selected cell;
• d) applying said voltage −Vpp to said well of said selected cell;
• e) applying a ground voltage to the selection and bit lines of the cells connected to the same word line as said selected cell;
• and
• f) applying said ground voltage to the word lines of the cells not connected to the same word line as said selected cell.

A method to erase an array of flash memory cells having a plurality of word lines, selection lines and bit lines connected to each of gate, source and drain of the plurality of flash memory cells arranged in a form of matrix and a well formed in each memory cell, the method comprising:

• a) selecting a block of cells to erase;
• b) applying a voltage −Vpp to the word lines of said block of cells;
• and
• c) applying a supply voltage Vcc to the selection lines, the bit lines and the wells of said block of cells.