US 2003/0197181 A1 · THIN FILM TRANSISTOR ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

Abstract

A thin film transistor array substrate, and manufacturing methods thereof, having a dual data link structure comprised of a first data link made from a gate metal layer and of a second data link made from a transparent conductive layer. A gate pad made from the gate metal layer electrically connects directly with the first data link, and to the second data link via a data pad protection electrode that passes through contact holes. The data pad protection electrode makes surface connections to the data pad. A data line is electrically connected via a contact electrode to the first data link. The data line and the data pad are formed from different metal layers. The data pad is protected by a gate insulating layer. The contact electrode is extended from the second data link.

Claims26

Dependent claims

A thin film transistor array substrate of a liquid crystal display, comprising:

a pixel electrode;
a thin film transistor connected to the pixel electrode;
a gate line and a data line connected to the thin film transistor;
a gate pad for contacting a gate driver;
a data pad for contacting a data driver;
a gate link connecting the gate pad to the gate line;
a conductive data link connected to the data pad and extending toward the data line;
and
a data pad protection electrode electrically connected to the data line and to the conductive data link;
wherein the data pad protection electrode extends over the data link and over the data pad.

7 more elements

A method of manufacturing a thin film transistor array substrate of a liquid crystal display, comprising the steps of:

(A) forming on a substrate a gate line and a crossing data line that are separated by a gate insulating film, a thin film transistor adjacent the crossing, a gate link and a gate pad that extends from the gate line, a data pad under the gate insulating film, and a data link that extends from the data pad toward the data line;
(B) forming a protective film over the entire surface of the substrate after completing step (a);
(C) defining a plurality of first contact holes and second contact holes through the protective film and through the gate insulating film;
wherein the first contact holes expose the data link, and wherein the second contact holes expose the data pad;
(D) defining a plurality of third contact holes through the protective film, wherein the third contact holes expose the data line;
(E) forming a pixel electrode that is electrically connected to the thin film transistor and a data pad protection electrode that is connected to the data link via the first contact holes, to the data pad via the second contact holes, and to the data line via the third contact holes.

3 more elements

Dependencies are inferred from the claim text.

Thin film transistor array substrate and manufacturing method thereof

Life of this patent

Thin film transistor array substrate and manufacturing method thereof

Life of this patent

Abstract

Claims26