Silicon on insulator standoff and method for manufacture thereof

A device fabricated by:

• preparing a pattern of an exposed device layer on a first dielectric layer in a silicon structure of a SOI wafer to form a patterned device layer;
• thereafter
• mating a silicon substrate layer of a substrate wafer through a second dielectric layer to the patterned device layer of the SOI wafer to form a composite device wherein said patterned device layer is sandwiched between said first and second dielectric layers;
• thereafter
• providing that exposed back surfaces of the composite device are polished to a desired thickness corresponding to a desired standoff height on one side and to at least a minimum height for mechanical strength on an opposing side, as well as to a desired smoothness, said composite device thereupon comprising said silicon substrate layer and said said silicon structure of the SOI wafer;
• thereafter
• etching voids in said silicon substrate layer and said silicon SOI wafer to expose said patterned device layer and to form standoffs and mechanical supports, wherein said first and second dielectric layers on both sides of said patterned device layer serve as suitable etch stops and surface protection for said patterned device layer;
• thereafter;
• removing exposed portions of said first and second dielectric layers to release said patterned device layer;
• and
• mating an array package as a package layer with said voids in said silicon substrate layer in proper registration to produce a finished device.

A method for manufacturing MEMS structures comprising:

• providing a patterned device layer on a first substrate layer to yield a patterned device wafer;
• bonding a substrate wafer having a second substrate layer to said patterned device wafer to form a composite wafer;
• polishing at least one of said two exposed surfaces of said substrate wafer and said patterned device wafer to desired thicknesses;
• etching out voids in said substrate wafer and in said patterned device down to both sides of said patterned device layer;
• and
• removing insulation of said patterned device layer to release patterns;
• and
• mounting said composite wafer on a package layer with said second substrate layer juxtaposed to said package layer.

A MEMS structure comprising a device manufactured by:

• providing a patterned device layer on a first substrate layer to yield a patterned device wafer;
• bonding a substrate wafer having a second substrate layer to said patterned device wafer to form a composite wafer;
• polishing at least one of said two exposed surfaces of said substrate wafer and said patterned device wafer to desired thicknesses;
• etching out voids in said substrate wafer and in said patterned device down to both sides of said patterned device layer;
• and
• removing insulation of said patterned device layer to release patterns;
• and
• mounting said composite wafer on a package layer with said second substrate layer juxtaposed to said package layer.

A MEMS structure comprising a device manufactured by:

• providing a patterned device layer on a first substrate layer to yield a patterned device wafer;
• bonding a substrate wafer having a second substrate layer to said patterned device wafer to form a composite wafer;
• polishing said two exposed surfaces of said substrate wafer and said patterned device wafer to desired thicknesses;
• etching out voids in said substrate wafer and in said patterned device down to both sides of said patterned device layer;
• and
• removing insulation of said patterned device layer to release patterns;
• and
• mounting said composite wafer on a package layer with said second substrate layer juxtaposed to said package layer.