Semiconductor integrated circuit
OwnerHitoshi Kurosawainventor
Life of this patent
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Abstract
A semiconductor integrated circuit has an inverter circuit for an input/output buffer connected to a pad portion of a port portion of a microcomputer, and an inverter circuit which performs an exclusive OR operation on the input and output of the former inverter circuit via a logic gate. The result of the exclusive OR operation is held in a register circuit installed in the microcomputer. The register value is read out to detect whether a buffer transistor included in the input/output-buffer inverter circuit is normal or not, so that a surge-oriented breakdown on the buffer transistor can be detected.
Claims19
A semiconductor integrated circuit including a microcomputer incorporating at least a CPU and memory, comprising:
- a buffer transistor connected to a pad portion of said microcomputer;
- a detection section for performing an arithmetic operation on an input and an output of said buffer transistor via a logic gate;
- and
- a memory section for holding a result of said arithmetic operation performed by said detection section,
- whereby it is detected from said result whether said buffer transistor is normal or abnormal.
A semiconductor integrated circuit including a microcomputer incorporating at least a CPU and memory, comprising:
- a plurality of circuits each including a buffer transistor connected to a pad portion of said microcomputer, a detection section for performing an exclusive OR operation on an input and an output of said buffer transistor and power supply cutoff means for cutting off power supply to said buffer transistor according to an output of said detection section, whereby in case where said output of said detection section of one of said plurality of circuits is abnormal, power supply to said buffer transistor is cut off and that circuit is switched to another circuit.
Dependencies are inferred from the claim text.