Method and apparatus for managing low power processor states

A method for managing power consumption of a processing unit having a software system and access to at least two hardware timers, the method comprising the steps of:

• determining a time period for which the software system is not expected to perform work;
• determining one of at least two low power states in which to put the processing unit in response to said time period;
• configuring one of the at least two hardware timers to facilitate waking up the software system in time for the software system to perform expected work;
• transitioning the processing unit and the software system into the one of at least two low power states;
• and
• transitioning the software system out of the one of at least two low power states in response to a hardware interrupt.

A method for managing power consumption of a processing unit having access to at least one hardware timer and having a software system with a periodic timer interrupt, the method comprising the steps of:

• reading a time interval remainder of the at least one hardware timer;
• determining a time period for which the software system is not expected to perform work, based upon reading the time interval remainder;
• determining one of at least two low power states in which to put the processing unit in response to said time period;
• transitioning the processing unit and the software system into said low power state;
• and
• transitioning the processing unit and the software system out of said low power state in response to a hardware interrupt.

An article of manufacture comprising a machine readable medium containing one or more programs for managing power consumption of a processing unit having a software system and access to at least one hardware timer, the article of manufacture comprising:

• first instructions for determining a time period for which the software system is not expected to perform work;
• second instructions for determining one of at least two low power states in which to put the processing unit in response to said time period;
• third instructions for configuring the hardware timer to facilitate waking up the software system in time for the software system to perform expected work;
• fourth instructions for transitioning the processing unit and the software system into said low power state;
• and
• fifth instructions for transitioning the processing unit and the software system out of said low power state in response to a hardware interrupt.

A program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform methods steps for managing power consumption of a processing unit having a software system and access to at least one hardware timer, said method steps comprising:

• determining a time period for which the software system is not expected to perform work;
• determining one of at least two low power states in which to put the processing unit in response to said time period;
• configuring the hardware timer to facilitate waking up the software system in time for the software system to perform expected work;
• transitioning the processing unit and the software system into said low power state;
• and
• transitioning the processing unit and the software system out of said low power state in response to a hardware interrupt.

An article of manufacture for use in accordance with a processing unit that has at least two low power states, an embedded software system and access to at least one hardware timer, the article comprising a machine readable medium containing one or more programs which when executed implement the steps of:

• determining a time period for which the software system is not expected to perform work;
• determining one of at least two low power states in which to put the processing unit in response to said time period;
• configuring the hardware timer to facilitate waking up the software system in time for the software system to perform expected work;
• transitioning the processing unit and the software system into said low power state;
• and
• transitioning the processing unit and the software system out of said low power state in response to a hardware interrupt.