Method and apparatus for using a dynamic random access memory in substitution of a hard disk drive

#1. Field of the Invention

#The present invention relates to a computer system using memory in substitution of a hard disk drive, and more particularly, to a computer system using a dynamic random access memory in substitution of a hard disk drive.

#2. Description of the Prior Art

#FIG. 1 is a block diagram of a first prior art computer system.

#FIG. 2 is a block diagram of a second prior art computer system.

#FIG. 3 is a block diagram of a computer system according to the present invention.

#Please refer to FIG. 3, which is a block diagram of a computer system (60) according to the present invention. The computer system (60) has a central processing unit (CPU) (62), a north bridge circuit (64), a south bridge circuit (66), a dynamic random access memory (DRAM) (68), an uninterruptible power supply (UPS) (70), and a basic input/output system (BIOS) (72). The north bridge circuit (64) has a conversion circuit (74), a data self-refresh module (76), a data compressing/decompressing module (78), and a memory control circuit (80). The conversion circuit (74) has an instruction format conversion module (82), a data format conversion module (84), and a control port (86). The DRAM (68) has a first memory block (88) and a second memory block (90). The CPU (60) is used for controlling overall operations of the computer system (60). The north bridge circuit (64) is used for controlling data transmission between the CPU (62) and the DRAM (68). The south bridge circuit (66) is used for controlling data transmissions between the BIOS (72) and the CPU (62) and controlling data transmissions of other peripherals (for example a keyboard and a mouse) and the CPU (62). The DRAM (68), such as a double data rate (DDR), memory is used for storing data and programs. The conversion circuit (74) is used for changing the formats of signals. The instruction format conversion module (82) is used for converting a hard disk access instruction into a memory access instruction, and the data format conversion module (84) is used for converting data complying with a hard disk storage format into data complying with a memory storage format. In addition, the control port (86) is used for receiving an input signal (92), and determining whether the conversion circuit (74) is activated or not according to the input signal (92). The memory control circuit (80) is used for controlling data access of the DRAM (68). The data compressing/decompressing module (78) is used for compressing the data that is about to be stored to reduce the corresponding data size in the DRAM (68), and decompressing compressed data retrieved from the DRAM (68) during the recovery of original data. The data self-refresh circuit (76) is used for constantly self-refreshing data stored in the DRAM (68) to prevent data from being lost or corrupted. The uninterruptible power supply (70) is used for providing the north bridge circuit (64) and the data self-refresh circuit (76) with appropriate operating voltages when the computer system (60) encounters a power failure so that the data self-refresh circuit (76) still can self-refresh the DRAM (68) to maintain the integrity of stored data. In the preferred embodiment, the first memory block (88) of the DRAM (68) is used for storing an operating system (94), and the second memory block (90) is used for storing user data (96). The CPU (62) will retrieve the user data (96) from the second memory block (90) to process the user data (96), and then the user data (96) that have been processed are restored back to the second memory block (90).

#The operation of the computer system (60) according to the present invention is described as follows. The user can first use a switch (98) to select whether the conversion circuit (74) is to be activated. That is, the user selects whether the prior art hard disk drive is to be replaced by the DRAM (68). The switch (98) can generate the input signal (98) with different voltage levels. Therefore, the control port (86) of the conversion circuit (74) can determine whether the conversion circuit (74) is going to be activated or not according to the voltage level of the input signal (92). For example, the user can use the switch (98) to generate the input signal (92) with a voltage level (Vcc) to the control port (86) so that the conversion circuit (74) is enabled. On the contrary, the user can use the switch (98) to generate the input signal (92) with a grounding voltage (0V) to the control port (86) so that the conversion circuit (74) is disabled. Please note that the switch (98) is electrically connected to the uninterruptible power supply (70), and different voltage levels of the input signal (92) are provided by the uninterruptible power supply (70). In addition, the switch (98) is hardware such as a jumper to select different voltage levels Vcc and 0 so that the status of the switch (98) is not affected by any power failures that the computer system (60) may encounter. When the computer system (60) is turned on, the BIOS (72) first detects the input signal (92). If the input signal (92) enables the conversion circuit (74), the BIOS (72) will divide the DRAM (68) into at least a first memory block (88) and a second memory block (90) respectively used for individually storing the operating system (94) and the user data (96). The second memory block (90) is used for replacing the prior art hard disk drive. The BIOS (72) simultaneously informs the operating system (94) about the memory address and capacity of the second memory block (90). The operating system (94) identifies the second memory block (90) as a virtual hard disk drive in the computer system (60). Therefore, an interrupt vector such as INT 13, which is used for accessing a hard disk drive, is intercepted by the conversion circuit (74), and then a hard disk access instruction generated by the CPU (62) is converted into a memory access instruction to access user data (96) stored in the second memory block (90). In addition, the data complying with a hard disk storage format will be converted into data complying with a memory storage format. For example, the data format conversion module (84), according to the present invention, will transform information about heads, cylinders, and sectors into information about memory addresses so that the data are stored in the second memory block (90) successfully. In addition, in order to increase the storage capacity of the fixed second memory block (90), the data compressing/decompressing module (78) first compresses data that is to be stored in the second memory block (90), and then the memory control circuit (80) writes the compressed data into the second memory block (90). When the CPU attempts to read user data (96) stored in the second memory block (90), the memory control circuit (80) will first retrieve compressed data from the second memory block (90), and then the data compressing/decompressing module (78) decompresses the compressed data to recover the original data. Finally, the data are further transmitted to the CPU (62) for subsequent operations through the north bridge circuit (64).

#According to an advanced configuration and power interface (ACPI) specification, a computer system has to store current configuration data of the computer system in a hard disk when the computer system is in an S4 state so that the computer system can quickly boot again after the computer system is shut down. Furthermore, when the computer system is in an SS state, the computer system is going to shut down and breaks off the electric power. The computer system, therefore, has to transfer all data temporarily stored in the memory back to the hard disk drive in order to maintain the data. In the preferred embodiment, the computer system (60) uses the DRAM (68) to replace the prior art hard disk drive. As the DRAM (68) is a volatile storage medium, the data stored in the DRAM (68) are lost when the electric power required by the DRAM (68) is cut off. Therefore, the present invention discloses a device and a method thereof to constantly self-refresh the memory. When the computer system (60) is in either the S4 state or the S5 state, the uninterruptible power supply (70) will constantly provide the north bridge circuit (64) and the data self-refresh circuit (76) with appropriate operating voltages so that the north bridge circuit (64) still can control the data self-refresh circuit (76) to self-refresh the DRAM (68) when the computer system (60) is turned off. That is, the DRAM (68) is constantly refreshed to maintain data and programs stored in the DRAM (68) with the help of the uninterruptible power supply (70). In the preferred embodiment, the memory functions of the DRAM (68) are very similar to a non-volatile storage medium. In conclusion, the DRAM (68), according to the present invention, not only has a faster data access speed than the prior art hard disk drive, but also maintains stored data when the computer system is completely turned off.