Method of writing, erasing, and controlling memory for memory device
AssigneeFujitsu Limited
InventorsShinpei Komatsu, Yumi Ishii, Tomohiro Hayashi, Shogo Shibazaki, Hiroyuki Itoh, Masaru Takehara
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AssigneeFujitsu Limited
InventorsShinpei Komatsu, Yumi Ishii, Tomohiro Hayashi, Shogo Shibazaki, Hiroyuki Itoh, Masaru Takehara
Estimating the term…
Data transferred from a host computer to a memory device is written into sectors whose addresses in a memory area are decoded by a decode table. Old data to be updated by the above data is erased or marked with erase flags. At a predetermined point of time, in order to create free areas, necessary data is evacuated to a primary memory media and unnecessary data indicated by erase flags is erased by a unit of predetermined memory size. Part of the memory media which has become defective is marked with a defect flag, and is replaced by an alternate area. In doing so, the decode table is rewritten to arrange the memory area.
A method of writing and erasing data in a memory device with a memory area having a plurality of blocks each with a plurality of sectors, the memory device erasing data by the unit of one block, the method comprising:
A method of erasing data in a memory device with a memory area having a plurality of blocks, the memory device erasing data by the unit of one block, the method comprising:
A method of erasing data in a memory device with a memory area having a plurality of blocks, the memory device erasing data by the unit of one block, the method comprising:
A method of managing a memory device having a memory area and a controller for controlling data writing in the memory area, the method comprising:
A method of checking a flag recorded on a memory area which has a possibility that part of the memory area can become unable to be erased, the method comprising:
A method of managing a memory device having a plurality of chips, each provided with a plurality of blocks, a free block of the blocks being used for writing new data, a block having old data replaced by the new data being erased by a unit of one block, the method comprising writing the new data into one of the chips, wherein one of the chips used for writing the new data is always the same for a given new data.
Dependencies are inferred from the claim text.
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Using address translation or modifications: in solid state disks
Masking faults in memories by using spares or by reconfiguring: using address translation or modifications
For an application-specific layout: for eeproms
Static stores
Term end not estimated
1. Field of the Invention
The present invention relates to a method of controlling the writing and erasing of information in flash memories and the like used as an external storage device for personal computers. This type of memory is incapable of having information written over existing information.
2. Description of the Prior Art
FIG. 1 is a block diagram showing a structure of a memory device serving as a basis for the present invention;
FIG. 2 is an illustration showing contents of an SRAM of the memory device of FIG. 1;
FIGS. 3 to 4 are illustrations showing contents of flash memories of 25-1 to 25-5 of the memory device of FIG. 1.
In the rest of the description, the following topics will be described in the following order: A. Structure of System Serving as Basis for Present Invention, B. Writing/Erasing Process for Data Evacuation and Free Area Creation, C. Enhancement of Erasing Process, D. Enhancement of Writing Speed and Allocation of Backup Areas in Case of Defective Sectors, E. Enhancement of Reliability of Decoding Unit for Address Conversion, F. Process of Estimating Writing Time, G. Enhancement of Reliability of Flag Check Process, and H. Memory Management Method of Reducing Size of Management Table.
A. Structure of System Serving as Basis for Present Invention
FIG. 1 is a block diagram showing the structure of a memory device 20 which uses flash memories and serves as a basis for the present invention.