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US 2003/0196024 A1Published application
Apparatus and method for a skip-list based cache
AssigneeExanet, Inc.
InventorShahar Frank
Life of this patent
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AssigneeExanet, Inc.
InventorShahar Frank
Estimating the term…
An apparatus and a method for the implementation of a skip-list based cache is shown. While the traditional cache is basically a fixed length line based or fixed size block based structure, resulting in several performance problems for certain application, the skip-list based cache provides for a variable size line or block that enables a higher level of flexibility in the cache usage.
A cache that stores a plurality of data blocks, said cache comprising:
A skip-list based key handler, said key handler comprising:
A method for a skip-list based cache, said method comprising:
A computer software product for a skip-list based cache, wherein said computer software product comprises:
Dependencies are inferred from the claim text.
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Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches: using…
Cache access modes: variable-length word access
Computing and data processing
Term end not estimated
1. Technical Field of the Present Invention
The present invention relates generally to the field of cache memory and more specifically to large size cache memories having a varying block size.
2. Description of the Related Art
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate the present invention and, together with the written description, serve to explain the aspects, advantages and principles of the present invention. In the drawings,
FIG. 1 is an exemplary block diagram of a skip-list based cache;
FIG. 2 is an exemplary flowchart of a skip-list based cache data read and update;
Prior to describing the aspects of the present invention, some details concerning the prior art will be provided to facilitate the reader's understanding of the present invention and to set forth the meaning of various terms.
As used herein, the term “computer system” encompasses the widest possible meaning and includes, but is not limited to, standalone processors, networked processors, mainframe processors, and processors in a client/server relationship. The term “computer system” is to be understood to include at least a memory and a processor. In general, the memory will store, at one time or another, at least portions of executable program code, and the processor will execute one or more of the instructions included in that executable program code. The terms “block” or “data block” mean a consecutive area of memory containing data. Different blocks may have different size unless specifically determined otherwise.
As used herein, the terms “predetermined operations,” the term “computer system software” and the term “executable code” mean substantially the same thing for the purposes of this description. It is not necessary to the practice of this invention that the memory and the processor be physically located in the same place. That is to say, it is foreseen that the processor and the memory might be in different physical pieces of equipment or even in geographically distinct locations.