Split completion performance of PCI-X bridges

Abstract

Embodiments are provided in which a method is described for transferring data in a digital system including a first bus, a second bus, a PCI-X bridge coupling the first and second buses, and a first device and a second device residing on the first and second buses, respectively. The first bus has the same or higher bandwidth than that of the second bus. According to the method, the PCI-X bridge immediately starts or resumes forwarding split completion data from the first device to the second device if the first device starts or resumes split completion data transfer to the PCI-X bridge at the beginning of a block (i.e., the start or resume byte address has the form of 128N). If the first device starts transfer to the PCI-X bridge not at the beginning of a block, the PCI-X bridge refrains from forwarding split completion data until (a) the first device sends the data byte at the beginning of the next block to the PCI-X bridge or (b) the byte transfer count is exhausted, whichever occurs first

Dependencies are inferred from the claim text.