Apparatus and method of implementing breq routing to allow functionality with 2 way or 4 way processors
AssigneeHewlett-Packard Development Company, L.P.
InventorsRoss V. La Fetra, Peter M. Arnold
Life of this patent
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AssigneeHewlett-Packard Development Company, L.P.
InventorsRoss V. La Fetra, Peter M. Arnold
Estimating the term…
An apparatus for implementing bus request routing to allow functionality with 2 way or 4 way processors, includes a bus configured to provide bus request routing; and a bus request route switching stage coupled to the bus and configured to select a first route configuration if two processors are coupled to the bus. The switching stage is also configured to select a second route configuration if more that two processors are coupled to the bus. The switching stage determines if two or more processors are coupled to the bus. A logic block may be used to determine the required configuration based on the detected processor population. A method of changing bus request routing to allow functionality with 2 way or 4 way processors, includes: detecting if a dual processor arrangement or a multi-processor arrangement is coupled to a bus; and selecting a first route configuration if a dual processor arrangement is coupled to the bus and selecting a second route configuration if a multi-processor arrangement is coupled to the bus.
An apparatus for implementing bus request routing to allow functionality with 2 way or 4 way processors, the apparatus comprising:
An apparatus for implementing bus request routing to allow functionality with 2 way or 4 way processors, the apparatus comprising:
A method of changing bus request routing to allow functionality with 2 way or 4 way processors, the apparatus comprising:
24 An apparatus for changing bus request routing to allow functionality with 2 way or 4 way processors, the apparatus comprising:
Dependencies are inferred from the claim text.