Circuits and methods for extracting a clock from a biphase encoded bit stream and systems using the same

A method of generating a frame clock from a biphase encoded audio bitstream comprising the steps of:

• detecting a sequence of bit phase transitions in the audio bitstream, each pair of consecutive bit phase transitions defining a sample having a sample size;
• during a preamble detection phase, performing the steps of:
• determining a sample length for each of a sequence of samples by determining a number of predetermined least common multiples in the corresponding sample size;
• and
• decoding the sample lengths for the sequence of samples to identify a preamble of a given preamble type;
• during a data detection phase, performing the steps of:
• determining the sample lengths for a sequence of data bits of the biphase bitstream;
• and
• decoding the sample lengths of the sequence data bits into binary data bits;
• and generating the frame clock in accordance with the steps of:
• determining an expected value of the frame clock level;
• performing an XNOR operation using the expected value of the frame clock level and the bit phase data to generate an intermediate signal;
• during a time window, registering the intermediate signal with an oversampling clock;
• and
• performing an XOR operation during the time window on the registered intermediate signal and the bit phase data to generate the clock edge of frame clock.

A audio interface comprising:

• a circuitry for extracting a frame clock from a received biphase encoded audio data stream, said receiver operable to:
• extract a sequence of samples each defined by a pair of consecutive bit transitions in the biphase bitstream;
• determine a length of each of said samples in units of a least common multiple;
• detecting a preamble from a sequence of the samples of predetermined lengths;
• decoding the preamble to determine an expected logic level of the clock in advance of an open time window;
• gating the expected level of the frame clock with the bit phase data to generate a control signal before the opening of the time window;
• and
• gating the first control signal with the biphase data to extract an edge of the frame clock.