Method and apparatus for detection of chemical mechanical planarization endpoint and device planarity

#This invention relates generally to chemical mechanical planarization (CMP) processes used in the manufacture of semiconductor devices. More specifically, the present invention pertains to techniques for determining an endpoint of CMP, and for determining the planarity of a semiconductor device.

#As the number of interconnect layers in integrated circuit chips increases, the planarization of dielectric and metal layers has become more critical. Chemical mechanical planarization is a procedure used in the fabrication of semiconductor devices to planarize device topography in multilevel semiconductor processing. However, the process must be closely monitored for endpoint detection to avoid the removal of portions of a functional device layer.

#Methods of determining an endpoint generally fall in two categories: in-line endpoint detection and in-situ endpoint detection. In-line endpoint detection measures film thickness prior to CMP and again after the device has been polished a predetermined time. However, this method assumes that CMP is a static process with a polish rate that is uniform through the device from die to die, or through a lot from device to device over multiple lots.

#FIG. 1 is a sectional view of a semiconductor device incorporating the present invention.

#FIG. 2 is a schematic of a mass spectrometer and CMP station.

#FIG. 3 is a graphic display of a mass spectral analysis of isotopic effluents illustrating planarity of a semiconductor device.

#The present invention provides an in-situ method for monitoring an endpoint in a chemical mechanical planarization (“CMP” or polishing) fabrication step, used in the manufacture of semiconductor devices, and for monitoring planarity of a semiconductor device during CMP processing. The present invention is described in the context of chemical vapor deposition (CVP) and planarization of dielectric layers of semiconductor devices. However the invention is not limited to the specific deposition process or the application of the invention to a dielectric layer of a device. The present invention may be incorporated in any number of processes for depositing or growing any device layer, and planarization of such device layers.

#In a preferred embodiment a layer formed over a substrate, comprises at least one material having at least one isotopic variation. The isotopic variation of the material is imparted within the layer such that the variation of atomic mass is a function of layer thickness. The variation takes the form of one or more sacrificial layers formed over a base layer. The sacrificial layers are removed leaving the base layer. The removal of the sacrificial layer is monitored in-situ, to detect an endpoint of the removal. In addition, concentration of the materials are measured to detect removal endpoint and planarity of the device.

#In one embodiment of the present invention, two dielectric sacrificial layers are deposited over a dielectric base layer as shown in FIG. 1. The sacrificial layers include isotopic variations of the dielectric material. Silicon has three isotopes, 28Si, 29Si and 30Si, in natural abundance of 92.2%, 4.7% and 3.1%, respectively. The sacrificial layers and the base dielectric layer may also be referred to as isotopic layers of the dielectric material. Many dielectric materials include silicon and its isotopic variations as materials of the dielectric material composition, such as silicon dioxide. In forming the sacrificial layers, additional amounts of the isotopes 28Si, 29Si and 30Si are injected separately in gaseous form, and in predetermined timed intervals, during the chemical vapor deposition of the dielectric material. Silicon isotopic variations are preferably used with a silicon-based dielectric material (SiO2) because the silicon isotopes are not chemically reactive with the dielectric material, and otherwise do not inhibit the growth of the device layers.