Etching method
AssigneeElpida Memory, Inc.
InventorMasahiko Ouchi
Life of this patent
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AssigneeElpida Memory, Inc.
InventorMasahiko Ouchi
Estimating the term…
To provide an etching method for broadening a trench opening between patterns of an etching mask in a dry process. The etching method of a semiconductor substrate in which silicon and a silicon nitride film are exposed at least on a surface of the semiconductor substrate, comprises an oxidation step of oxidizing the silicon and the silicon nitride film from an exposed surface to a given film thickness by spraying the semiconductor substrate with substances excited by plasma discharge of O2 gas as a reaction gas, and an etching step of etching the semiconductor substrate oxidized in the oxidation step by plasma using a reaction gas comprising at least O2 gas and CH2F2 gas.
An etching method of a semiconductor substrate in which silicon and a silicon nitride film are exposed at least on a surface of said semiconductor substrate, comprising:
An etching method of a semiconductor substrate, comprising:
An etching method of a semiconductor substrate, comprising:
Dependencies are inferred from the claim text.
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Of isolation regions comprising dielectric materials: using trench refilling with dielectric materials, e.g. shallow trench isolations
Of inorganic materials: by chemical means
Etching of wafers, substrates or parts of devices: using masks for conductive or resistive materials
Isolation regions comprising dielectric materials: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
Term end not estimated
The present invention relates to an etching method for broadening a trench opening between patterns of a silicon nitride film (an etching mask) in a dry process.
There is STI (Shallow Trench Isolation) as one of technologies for electrically isolating elements formed on a silicon substrate from one another. The STI is generally formed by forming a trench in Si using as a mask of a Si3N4/SiO2 film, burying SiO2 in the trench, and flattening by CMP (Chemical and Mechanical Polishing).
In the STI, dry etching such as RIE (Reaction Ion Etching) is used for forming the trench, in which electrical leakage is caused through crystal defects (e.g., radiation damage etc.) and shape defects (e.g., RIE damage, heterogeneous film of liner SiO2, void/seam of buried SiO2, etc.) as fining proceeds in the semiconductor device. In order to prevent such problems, there is an attempt for improvement through a pullback by a wet process (a wet etching) using heated phosphoric acid etc. Here, the term “pullback” is a step of removing/retracting a part of an etching mask such as Si3N4 etc., which offers an obstacle at a later step, (in case of STI, a part neighboring the trench, which offers an obstacle in burying SiO2).
FIGS. 1A, 1B, 1C, 1D, 1E and 1F are systematic and partial cross-sectional views of each step showing a structure of a semiconductor substrate before the oxidation step in an etching method of embodiment 1 of the present invention.
FIGS. 2A, 2B and 2C are systematic and partial cross-sectional views showing steps in an etching method of embodiment 1 of the present invention.
FIGS. 3A, 3B, 3C and 3D are systematic and partial cross-sectional views of each step showing a structure of a semiconductor substrate after the pullback step in an etching method of embodiment 1 of the present invention.
An etching method of a semiconductor substrate (1 in FIG. 2), in which silicon (2 in FIG. 2) and a silicon nitride film (4 in FIG. 2) are exposed at least on a surface of the substrate, comprises an oxidation step (Refer to FIG. 2B) and an etching step (FIG. 2C). In the oxidation step, the silicon and the silicon nitride film are oxidized from an exposed surface to a given film thickness by spraying the semiconductor substrate with substances excited by plasma discharge of O2 gas as a reaction gas. In the etching step, the semiconductor substrate oxidized in the oxidation step by plasma is etched using a reaction gas comprising at least O2 gas and CH2F2 gas. Therefore, it is possible to broaden a trench opening (opening distance) between patterns of the silicon nitride film (an etching mask) keeping a surface uniformity of the substrate because the etching method forms a SiON film on the surface of the silicon nitride film in the oxidation step and prevents rapid acceleration of an etching rate of the silicon nitride film with lapse of processing time of the etching step.
Embodiment 1 of the present invention is explained by using drawings. FIGS. 1A, 1B, 1C, 1D, 1E and 1F are systematic and partial cross-sectional views showing structures of a semiconductor substrate before an oxidation step in a etching method of embodiment 1 of the present invention. FIGS. 2A and 2B and 2C are systematic and partial cross-sectional views showing steps in the etching method of embodiment 1 of the present invention. FIGS. 3A, 3B, 3C and 3D are systematic and partial cross-sectional views showing structures of the semiconductor substrate after a pullback step in the etching method of embodiment 1 of the present invention. FIG. 4 is a systematic view showing a structure of an ashing system in the etching method of embodiment 1 of the present invention.
In the semiconductor substrate (a wafer) used in embodiment 1, a trench 6 is formed in a silicon substrate 2 formed a silicon nitride film 4 and a silicon oxide film 3 as shown in FIG. 1F. The semiconductor substrate 1 is formed by the following steps.