Method of manufacturing a portion of a memory

#1. Field of the Invention

#The invention relates generally to the removal of extrusions that form during the fabrication of integrated circuits. More particularly, the invention relates to the removal of extrusions that form on metal-oxide-semiconductor (MOS) structures.

#2. Description of the Related Art

#These and other aspects, advantages, and novel features of the invention will become apparent upon reading the following detailed description and upon reference to the accompanying drawings.

#FIG. 1 is a diagram depicting communication between a microprocessor and a memory device.

#FIG. 2 shows a memory array containing multiple wordlines and bitlines.

#A conductor, preferably composed of a tungsten silicide (WSix) barrier layer and titanium silicide (TiSix) conductive layer, is disclosed for use in a semiconductor structure such as a wordline, transistor or any other structure. A wet etch, preferably composed of an oxidizing and chelating agent in solution, is further disclosed for removing extrusions which may protrude from these low-resistance segments.

#As illustrated in FIG. 1, a novel memory array 10 is disclosed herein that interfaces with other electronic circuitry 12 via conventional address signals 14 and data signals 16. The address signals 14 select one or more memory cells in the memory array 10. The data signals 16, on the other hand, carry data that is stored in or retrieved from the memory array 10.

#In one embodiment, the memory array 10 disclosed herein is a synchronous dynamic random access memory (SDRAM). In other embodiments the memory array 10 may comprise a wide variety of memory devices such as static memory, dynamic memory, extended data out memory or any other memory type known in the art.