Method of manufacturing semiconductor device with reduced number of process steps for capacitor formation
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorNaofumi Murata
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Abstract
A method of manufacturing a semiconductor device and a method of forming a capacitor allow the formation of a high-performance capacitor without increasing the number of process steps. A silicide protection film (11c) is formed to cover a lower electrode (6) of a capacitor. The silicide protection film (11c) is formed during the process step of forming another silicide protection film (11a). An upper electrode (19) of the capacitor is formed of metal film and opposed to the lower electrode (6) with the silicide protection film (11c) sandwiched in between. A portion of the silicide protection film (11c) which is sandwiched between the upper electrode (19) and the lower electrode (6) serves as a capacitor dielectric film.
Claims17
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) preparing a substrate;
- (b) partially forming an element isolation insulating film in a main surface of said substrate;
- (c) forming a first semiconductor element in a first element forming region defined by said element isolation insulating film, said first semiconductor element having first source/drain regions formed in said main surface;
- (d) forming a first electrode of a capacitor;
- (e) forming a silicide protection film of insulation film to cover said first electrode, but not to cover said first semiconductor element;
- (f) forming a first silicide layer by silicidation of said first source/drain regions;
- and
- (g) forming a second electrode of said capacitor which is opposed to said first electrode with said silicide protection film sandwiched in between.
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) preparing a substrate;
- (b) partially forming an element isolation insulating film in a main surface of said substrate;
- (c) forming a semiconductor element in a first element forming region defined by said element isolation insulating film, said semiconductor element having source/drain regions formed in said main surface;
- (d) forming a first electrode of a capacitor;
- (e) forming an etching stopper film of insulation film to cover said semiconductor element and said first electrode;
- and
- (f) forming a second electrode of said capacitor which is opposed to said first electrode with said etching stopper film sandwiched in between.
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) forming a first metal film serving as a first interconnection and a second metal film serving as a first electrode of a capacitor, within a first interconnection layer;
- (b) forming a capping film to cover said first and second metal films;
- and
- (c) forming a third metal film serving as a second electrode of said capacitor within a second interconnection layer formed on said first interconnection layer, said third metal film being opposed to said second metal film with said capping film sandwiched in between.
Dependencies are inferred from the claim text.