Optoelectronic device and method of manufacture thereof

#The present invention is directed, in general, to a communication device and, more specifically, to an optoelectronic device and method of manufacture thereof.

#One common structure currently employed in optoelectronic devices is the p-i-n (PIN) device. In a typical PIN device, an intrinsic layer is disposed between a p-type layer and a n-type layer, forming a heterostructure device. The intrinsic layer has a larger index of refraction than the p and n layers, resulting in a natural waveguide. Furthermore, the energy band discontinuities in the conduction and valence bands in the PIN device facilitate carrier confinement within the active layer. In short, the PIN device is well suited for a variety of emitting and detecting optoelectronic device applications.

#Presently, it is common for PIN devices to be formed as buried PIN structures. In such devices, a mesa strip is formed out of the traditional PIN device, and thereafter, blocking layers are positioned on the sides of the mesa strip. Often, the blocking layers are doped with impurity ions, such as iron, ruthenium or titanium, to form semi-insulating blocking layers. It has been found that the addition of iron-impurity ions increases the resistivity of the blocking layers and reduces the leakage current that typically occurs at the interface between the PIN device and the blocking layers. After the blocking layers have been formed, it is common for a P-type (zinc) doped cladding layer to be formed thereover, thus forming a capped-mesa buried heterostructure (CMBH).

#The invention is best understood from the following detailed description when read with the accompanying FIGUREs. It is emphasized that in accordance with the standard practice in the electronic industry, various features may not be drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or reduced for clarity of discussion. Reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

#FIG. 1 illustrates a cross-sectional view of one embodiment of an optoelectronic device in accordance with the principles of the present invention;

#FIG. 2 illustrates a cross-sectional view of a partially completed optoelectronic device;

#Referring initially to FIG. 1, illustrated is a cross-sectional view of one embodiment of an optoelectronic device 100, as disclosed herein. The present invention is broadly directed to an optoelectronic device 100 made of any material or compound that may have use in such devices. In the illustrative embodiments described herein, the optoelectronic device 100 is specifically discussed as a group III-V based device, for example an indium phosphide/indium gallium arsenide phosphide based device, a gallium arsenide based device, an aluminum gallium arsenide based device, or another group III-V based device. Even though the present invention is discussed in the context of a group III-V based device, it should be understood that the present invention is not limited to group III-V compounds and that other compounds located outside groups III-V, may be used.

#In addition to the optoelectronic device 100 being discussed as a group III-V based device, the optoelectronic device 100 is further being discussed as a PIN diode. While the present invention is discussed in the context of a PIN diode, it should be noted that other devices, such as lasers, photodetectors, avalanch photo-diode detectors (APDs), modulators, or other similar devices, may comprise the optoelectronic device 100. As an example, the present invention is particularly suited for any optical device including a mesa structure.

#Turning back to the illustrative embodiment of FIG. 1, the optoelectronic device 100 includes a mesa structure 120 formed over a substrate 110. The mesa structure 120 may comprise a variety of layers and materials. In the embodiment shown, however, the mesa structure 120 includes a first layer 122 (e.g., a first cladding layer), a conventional intrinsic layer 124, and a second layer 126 (e.g., a second cladding layer).