Synchronization code detecting apparatus for cell search in a CDMA system

Abstract

A synchronization code detecting apparatus is designed for synchronization code detection in cell search in a code division multiple access (CDMA) system. The synchronization code detecting apparatus mainly includes a compensation unit for providing frequency offset compensation to the incoming signal and for determining a plurality of sampling points of the incoming signal. A plurality of sub-detecting units is coupled to the compensation unit for detecting a synchronization code of the incoming signal transmitting from the compensation unit. A selection unit is coupled to the output of each sub-detecting unit for selecting a plurality of slot boundaries as a plurality of candidates to be forwarded to a second processing stage. Consequently, the synchronization code detecting apparatus effectively reduces the effect of clock offset in the system without increasing the hardware complexity and power consumption.

Dependencies are inferred from the claim text.