Methods used to simultaneously perform automated at-speed testing of multiple gigabit per second high serial pin count devices
AssigneeBroadcom Corporation
InventorAndrew C. Evans
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AssigneeBroadcom Corporation
InventorAndrew C. Evans
Estimating the term…
A method performs automated at-speed testing of devices. The method includes the steps of generating multiplexer control signals, forming various signal paths between a set of multiplexers and the devices based on the multiplexer control signals, and routing test signals having multiple gigabit per second (MGBPS) baud rates through the signal paths.
A method for performing automated at-speed testing of devices comprising the steps of:
A method for performing automated at-speed testing of a device, comprising:
Dependencies are inferred from the claim text.
From the US filing history. Foreign family members aren’t listed.
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Tester hardware, i.e. output processing circuits: tester configuration
Measuring electric variables
Term end not estimated
1. Field of the Invention
The present invention relates to automated testing systems and methods that perform at-speed testing of high serial pin count devices that transmit serial data at gigabit per second baud rates.
2. Related Art
The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate the present invention and, together with the description, further serve to explain the principles of the invention and to enable a person skilled in the pertinent art to make and use the invention.
FIG. 1A shows an exemplary testing system according to embodiments of the present invention.
FIG. 1B shows a more detailed view of the testing system in FIG. 1A.
The present invention will now be described with reference to the accompanying drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Additionally, the left-most digit(s) of a reference number identifies the drawing in which the reference number first appears.
Overview of Testing System and Operation
According to embodiments of the present invention, an automated testing system 100 comprises a testing system (e.g., automated test equipment (ATE)) 102 coupled to a tested system 104, as shown in FIGS. 1A-1C. The ATE 102 can be a Teradyne Tiger ATE or any other ATE now developed or developed in the future. The tested system 104 includes a test head 106 that includes a device interface board (DIB) 108 having a device under test (DUT) holding device 110, which can be a socket or contactor. The DIB 108 is coupled to a rider board 112 via a coupling system 114 (114A-114C). The rider board 112 can be essentially a “daughter” board that connects to a surface the DIB 108 opposite a surface with the DUT holding device 110 via board connectors 114C, which may be high-density parallel board connectors described in more detail below with reference to FIGS. 6 and 10. The ATE 102 includes analog 116 and digital 118 signal stimulus and capture/measure devices.