Analog storage semiconductor memory that uses plural write voltages and plural read voltages having different voltage levels

An analog storage semiconductor memory comprising;

• a write voltage supply circuit for supplying a plurality of types of write voltage to a control gate of a memory cell transistor;
• a read voltage supply circuit for supplying a plurality of types of read voltage to said control gate of said memory cell transistor;
• and
• a write control circuit for executing a operation of making said read voltage supply circuit supply said read voltage and judging a threshold voltage of said memory cell transistor, and for executing a operation of making said write voltage supply circuit supply said write voltage with decreasing as said operation threshold voltage approaching said voltage corresponding to said analog data.

An analog storage semiconductor memory comprising:

• a write voltage supply circuit for supplying n types (n≧2) of write voltage Vw1, . . . , Vwn (Vw1> . . . >Vwn) to a control gate of a memory cell transistor;
• a read voltage supply circuit for supplying n types of read voltage Vr1, . . . , Vrn (Vr1< . . . <Vrn) to said control gate of said memory cell transistor;
• and
• a write control circuit for sequentially executing, from m=1 to m=n, the m-th write cycle where the write operation at the m-th write voltage Vwm and read operation at the m-th read voltage Vrm are repeated until the operation threshold value of said memory cell transistor exceed the m-th read voltage Vrm.