Image processing device for layered graphics

#1. Field of the Invention

#The present invention relates to an image processing device for layered graphics and a semiconductor chip implementing that device. More particularly, the present invention relates to an image processing device, as well as to a semiconductor integrated circuit chip, which reads out a plurality of source images from a graphics memory and combines them in a predetermined order to form a single picture.

#2. Description of the Related Art

#FIG. 1 is a conceptual view of the present invention;

#FIG. 2 is a block diagram showing an embodiment of the present invention;

#FIG. 3 shows the details of a graphics chip used in the equipment of FIG. 2;

#Preferred embodiments of the present invention will be described below with reference to the accompanying drawings, wherein like reference numerals refer to like elements throughout.

#FIG. 1 is a conceptual view of the present invention. According to the present invention, the proposed image processing device comprises a memory 1, a reading circuit 2, a combination order controller 3, and a combiner circuit 4. The memory 1 has a plurality of predetermined storage areas each containing one layer of image data. The reading circuit 2 reads them out of the memory 1 as source images for a final picture. The combiner circuit 4 contains a plurality of image combiners cascaded one after another to combine the plurality of source images provided from the reading circuit 2 in a predetermined order. The combination order controller 3, disposed between the reading circuit and combiner circuit, determines which source image to supply to each image combiner, thereby controlling the order of layers to be combined by the combiner circuit 4.

#The above system operates as follows. A plurality of source images are kept in the memory 1, each corresponding to a particular layer of a picture. This layer assignment, however, has to be flexible. Suppose, for example, that there are four source images A (top-most layer), B, C, and D (bottom-most layer). The reading circuit 2 reads out a predetermined amount of image data D, C, B, and A in that order and supplies it to the combination order controller 3. The combination order controller 3 determines to which image combiner each source image should go, according to a given control word. This control word is stored in, for example, a register that can be set by an external entity. In the present case, this control word register specifies that the images D, C, B, and A be combined in that order.