System and method of amplifier gain control by variable bias and degeneration

#The present invention generally relates to variable gain amplifier control circuits. More specifically, the present invention relates to gain control techniques for a.c. (Alternating Current), IF (Intermediate Frequency), and RF (Radio Frequency) signals.

#Variable gain amplifier circuits are commonly used in the electronics and semiconductor industry for automatic gain control applications, voltage control filters, automatic signal levelling for A/D amplitude modulation and variable gain transimpedance, for example. Commercial devices in which variable gain circuits are used extensively include personal digital assistants (PDAs), mobile communication devices, cellular phones, and wireless two-way data communications devices, collectively referred to herein as mobile devices.

#FIG. 1 shows a circuit schematic of a typical variable gain amplifier circuit. Variable gain amplifier (VGA) circuit 10 includes a load stage 12, a differential input stage 14, a degeneration stage 16 and a current source 18 connected in series between a first voltage supply such as VDD and a second voltage supply such as VSS or ground. A first current branch of amplifier circuit 10 consists of resistor 20, n-type bipolar transistor 24 and n-type degeneration transistor 28. A second current branch of amplifier circuit 10 consists of resistor 22, n-type bipolar transistor 26 and n-type degeneration transistor 30, where the resistors, bipolar transistors and degeneration transistors are identical to each other. VGA circuit 10 receives a pair of input signals IN+ and IN− at the base terminal of bipolar transistors 24 and 26 respectively for providing a pair of output signals OUT− and OUT+ at the collector terminals of bipolar transistors 24 and 26 respectively. A degeneration voltage signal DCTRL is connected to both gate terminals of degeneration transistors 28 and 30 for adjusting their effective channel resistance. A bias voltage VBIAS connected to the gate of n-type transistor 18 controls the total current flowing through VGA circuit 10. The voltage gain of the output signals OUT− and OUT+ relative to the input signals IN+ and IN− depends on the ratio of the load resistance and the resistance of the degeneration transistors 28 and 30. More specifically, VG=Rload/Rdegen, where VG is the voltage gain, Rload is the load resistor value and Rdegen is the resistance value of the degeneration transistors. Therefore, by controlling the gate to source voltage of the degeneration transistors 28 and 30 via DCTRL, their effective channel resistance Rdegen can be changed, and thus the gain of VGA circuit 10 can be varied. Although not shown in FIG. 1, a gain control circuit sets the desired gain of VGA circuit 10 through signal DCTRL.

#Embodiments of the present invention will now be described, by way of example only, with reference to the attached Figures, wherein:

#FIG. 1 shows a circuit schematic of a conventional variable gain amplifier circuit of the prior art;

#FIG. 2 shows a block diagram illustrating a Variable Bias Degeneration Automatic Gain Control system in accordance with an embodiment the present invention;

#A gain control circuit that permits a variable gain amplifier circuit to operate with high input linearity and low power consumption is disclosed. The variable gain amplifier includes a standard differential bipolar transistor input circuit and a pair of degeneration transistors connected to a current source transistor. The gain control circuit provides a variable degeneration control voltage to vary the effective resistance of the degeneration transistors and a variable bias voltage to vary the current of the current source transistor. The input linearity of the variable gain amplifier is controlled independently of gain by adjusting the effective resistance and the current in an inverse relationship such that at maximum gain the current is at a maximum while the degeneration resistance is at a minimum, and at minimum gain the current is at a minimum while the degeneration resistance is at a maximum. Therefore the variable gain amplifier can be controlled to operate with high input linearity and low power at lower ranges of gain.

#FIG. 2 is a block diagram of a Variable Bias Degeneration Automatic Gain Control system (VBDAGC) according to an embodiment of the present invention. VBDAGC system 100 includes a variable gain amplifier (VGA) circuit 102 and a gain control circuit 104. The gain control circuit 104 simultaneously controls the variable amplifier degeneration resistance and current using an inverse relationship. As the degeneration resistance increases, the current decreases to ensure that the bias conditions are satisfied at all times. Thus, at high gain, the current is at its maximum while the degeneration resistance is at a minimum. Similarly, as the degeneration resistance is increased toward the maximum, the current is reduced to its minimum.

#Variable gain amplifier 102 includes a load circuit 106 coupled to output terminals Out− and Out+, and to the collector terminals of input stage bipolar transistors 108 and 110. Load circuit 106 receives load control signal LCTRL for controlling the load upon transistors 108 and 110. The base terminals of bipolar transistors 108 and 110 receive input signals In+ and In− respectively, and their emitter terminals are connected to the drain terminals of degeneration transistors 112 and 114 respectively. The gate terminals of transistors 112 and 114 receive degeneration voltage DCTRL for adjusting their effective resistance. The common source terminals of transistors 112 and 114 are coupled to VSS through current source transistor 116. Current source transistor 116 receives current source bias voltage BCTRL for adjusting the current through VGA circuit 102. Gain control circuit 104 receives a reference voltage VREF, a bias voltage VBIAS, and a control voltage VCTRL, for providing voltage signals LCTRL, DCTRL and BCTRL. Generally, gain control circuit 104 adjusts the voltage levels of LCTRL, DCTRL and BCTRL in accordance with the voltage level of VCTRL relative to VREF to provide a desired gain for VGA circuit 102. VGA circuit 102 can then amplify input signals In+ and In− and drive the resulting amplified signals on output terminals Out− and Out+ with the desired gain.