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US 2003/0193362 A1Published application
Level shifting circuit
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorToshifumi Kobayashi
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AssigneeMitsubishi Denki Kabushiki Kaisha
InventorToshifumi Kobayashi
Estimating the term…
Term end not estimated
A level shifting circuit includes discharging means made up of a first high-voltage N-type transistor and a second high-voltage N-type transistor whose gates are biased respectively in a predetermined voltage and whose drains are connected to a first and second nodes respectively; and a first low-voltage N-type transistor and a second low-voltage N-type transistor whose drains are connected to sources of the first and second high-voltage N-type transistors respectively, whose gates are connected to the complementary input signal and whose sources are grounded respectively, and the predetermined voltage is set to an intermediate voltage between a threshold voltage of the first and second high-voltage N-type transistors and a breakdown voltage of the first and second low-voltage N-type transistors.
A level shifting circuit comprising:
Dependencies are inferred from the claim text.
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Modifications for increasing the maximum permissible switched voltage: in field-effect transistor switches
Using complementary field-effect transistors: using additional transistors in the input circuit
Pulse technique
From the US filing history. Foreign family members aren’t listed.
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1. Field of the Invention
The present invention relates to a level shifting circuit for converting a logical level.
2. Description of Related Art
FIG. 1 is a circuit diagram to show a level shifting circuit in accordance with a first preferred embodiment of the present invention;
FIG. 2 is a circuit diagram to show an example of V mid generation circuit;
FIG. 3 is a circuit diagram to show another example of V_mid generation circuit;
Hereafter, the preferred embodiments of the present invention will be discussed.
First Preferred Embodiment
FIG. 1 is a circuit diagram to show a level shifting circuit in accordance with the first preferred embodiment of the present invention. In a semiconductor device using two types of voltage sources, a low voltage source (VCCL: the first voltage source) and a high voltage source (VCCH: the second voltage source), the level shifting circuit serves as a circuit which converts the logical level of the voltage VCCL into the logical level of the voltage VCCH. In FIG. 1, reference sign IN_L denotes an input signal having the logical level of the voltage VCCL and sign OUT_H denotes an output signal having the logical level of the voltage VCCH. Reference sign INV0101_L denotes an inverter operating by the low voltage source (VCCL), to which the input signal IN_L is inputted. Reference sign INV0102_L denotes an inverter operating by the low voltage source (VCCL), whose input is an output of the inverter INV0101_L (node N0101).