Level shifting circuit
AssigneeRenesas Technology Corp.
InventorToshifumi Kobayashi
Life of this patent
Estimating the term…
Loading patent…
AssigneeRenesas Technology Corp.
InventorToshifumi Kobayashi
Estimating the term…
A level shifting circuit includes a charging means consisting of a charging regulator circuit which charges a second node to a logic “H” by setting a second switching circuit to an ON state and thereafter brings back the second switching circuit to an OFF state when a first node is changed from a logic “H” to a logic “L” by a change of an input signal, and charges the first node to the logic “H” by setting a first switching circuit to the ON state and thereafter brings back the first switching circuit to the OFF state when the second node is changed from the logic “H” to the logic “L” by the change of the input signal.
A level shifting circuit comprising:
Dependencies are inferred from the claim text.
Drawings are temporarily unavailable. Open the PDF at USPTO
From the US filing history. Foreign family members aren’t listed.
Backward citations are indexed for grants only.
Using complementary field-effect transistors: using additional transistors in the feedback circuit
Using complementary field-effect transistors: using additional transistors in the input circuit
Pulse technique
Term end not estimated
1. Field of the Invention
The present invention relates to a level shifting circuit for converting a logical level.
2. Description of Related Art
FIG. 1 is a circuit diagram to show a level shifting circuit in accordance with a first preferred embodiment of the present invention;
FIG. 2 is a waveform chart to show an operation of the level shifting circuit in accordance with the first preferred embodiment of the present invention;
FIG. 3 is a circuit diagram to show a level shifting circuit in accordance with a second preferred embodiment of the present invention;
Hereafter, the preferred embodiments of the present invention will be discussed.
First Preferred Embodiment
FIG. 1 is a circuit diagram to show a level shifting circuit in accordance with the first preferred embodiment of the present invention. In a semiconductor device using two types of voltage sources, a low voltage source (VCCL: the first voltage source) and a high voltage source (VCCH: the second voltage source), the level shifting circuit serves as a circuit which converts the logical level of the voltage VCCL into the logical level of the voltage VCCH. In FIG. 1, reference sign IN_L denotes an input signal having the logical level of the voltage VCCL and sign OUT_H denotes an output signal having the logical level of the voltage VCCH. Reference sign INV0101_L denotes an inverter operating by the low voltage source (VCCL), to which the input signal IN_L is inputted. Reference sign INV0102_L denotes an inverter operating by the low voltage source (VCCL), whose input is an output of the inverter INV0101_L (node N0101).