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AssigneeMicron Technology, Inc.
InventorsFrank L. Hall, Cary J. Baerlocher
Estimating the term…
Integrated circuit packages that connect solder balls between solder ball pads of a die and substrate pads of a printed circuit board (PCB). The solder balls are electrically disconnected from any circuit of the die, i.e., “dummy” solder balls, and are used to temporarily hold the die in position with respect to the PCB until the circuit is wire bonded and an underfill material is cured between the die and the PCB to more permanently connect them together. The underfill material is selected to have a coefficient of thermal expansion (CTE) that is substantially equal to the CTE of the solder balls to prevent thermal mismatch problems. An overmolding compound is disposed about the die and the underfill material and about the wire bonds to complete the package. Various arrangements of the solder ball pads on the die include columnar and row, corner, diagonal, cross, and periphery arrangements.
An apparatus, comprising:
An apparatus, comprising:
An integrated circuit package, comprising:
A board-on-chip semiconductor integrated circuit package, comprising:
A board-on-chip semiconductor integrated circuit package, comprising:
A method, comprising:
A method, comprising:
A method of forming an integrated circuit package, comprising:
A method of forming a board-on-chip semiconductor integrated circuit package, comprising:
A method of forming a board-on-chip semiconductor integrated circuit package, comprising:
An electronic system, comprising:
An electronic system, comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
Backward citations are indexed for grants only.
The semiconductor body being completely enclosed: by a substrate and the encapsulations
Manufacture or treatment: of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
Characterised by their shape or disposition: on active surfaces of flip-chip devices, e.g. underfills
Of bump connectors, dummy bumps or thermal bumps: using blanket deposition
Term end not estimated
The present invention relates to semiconductor integrated circuit (IC) packaging. In particular it relates to a board-on-chip (BOC) configuration using electrically disconnected solder balls for mounting a die to a substrate.
The art of packaging ICs has continued to evolve and today represents a tremendous engineering challenge as ICs become smaller and more transistor dense. The packages encase many varieties of ICs, such as microprocessors, application specific ICs, cache and system memory, and range from packaging a single ICs to multiple ICs. No matter which type of package is used, the considerations for packaging are all generally the same. For example, packages are desired that are relatively inexpensive, are mechanically stable, are properly sized and can reliably distribute electric signals between various circuits and components while removing unwanted heat and offering protection in hostile environments. As expected, a trade-off exists between simultaneously being able to optimize each of the above considerations.
In conventional BOC package configurations, an IC in the form of a die is secured to a printed circuit board (PCB) by means of a two-sided tape that is sandwiched between the die and PCB. After curing, the die is electrically connected to the PCB via wire bonding and over-molded with an epoxy molding compound to form a complete package. The over-molding is typically performed in a molding cavity under high temperature and pressure conditions, such as 180° C. and 1000 psi, where the epoxy molding compound is forced to fill crevices in and around the wire bonds, the die and the PCB. During cooling, however, tremendous thermal mismatch occurs between all the foregoing mentioned structures which mechanically stresses the package. As a result, silica filler in the epoxy molding compound (typically 80-90% by weight) often impinges upon the die and the PCB and frequently mechanically and/or electrically compromises the package.
FIG. 1A is an end view in accordance with the teachings of the present invention of a die to be mounted to a substrate;
FIG. 1B is an end view in accordance with the teachings of the present invention of a die having solder ball pads in a processing step subsequent to FIG. 1A;
FIG. 1C is an end view in accordance with the teachings of the present invention of a die having electrically disconnected solder balls in a processing step subsequent to FIG. 1B;
In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration, specific embodiments in which the inventions may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that process, electrical or mechanical changes may be made without departing from the scope of the present invention. The terms die and substrate used in this specification includes any base semiconductor structure such as silicon-on-sapphire (SOS) technology, silicon-on-insulator (SOI) technology, thin film transistor (TFT) technology, doped and undoped semiconductors, epitaxial layers of a silicon supported by a base semiconductor structure, as well as other semiconductor structures well known to one skilled in the art. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined only by the appended claims and their equivalents.
The following description and figures use a reference numeral convention where the first digit of the reference numeral corresponds to the figure and the following two digits correspond to like elements throughout the specification. For example, the die having electrically disconnected solder balls has a reference number of 102, 202, 302, etc. corresponding to the die X02 in FIGS. 1, 2, 3, etc. where X is the number of the figure in which the reference numeral appears.
With reference to FIG. 1A, a die 102 to be fabricated into an IC package with electrically disconnected solder balls is shown in end view. The die has sides 104, a bottom 106 and a circuit side 108. As is known, a die was originally one unit of perhaps a thousand dies of a wafer (not shown) separated on the wafer from other units by scribe or saw lines and physically separated from each other by either scribing or sawing the wafer along their respective lines. Often time dies are interchangeably referred to as chips. In some parts of the country, dies are referred to as bars. All terms of art are embraced by this invention. While not required to be any particular size, for reference purposes, the die in one embodiment is in a range from about 300 to about 150 microns thick.