Interdigitated leads-over-chip lead frame and device for supporting an integrated circuit die
AssigneeMicron Technology, Inc.
InventorsAaron Schoenfeld, Jerry M. Brooks
Life of this patent
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AssigneeMicron Technology, Inc.
InventorsAaron Schoenfeld, Jerry M. Brooks
Estimating the term…
An inventive Leads-Over-Chip (LOC) lead frame includes an assembly of interdigitated leads constructed to overlie double-sided adhesive tape on the front-side surface of an integrated circuit (IC) die. An attachment surface of each lead is adhesively attachable to the tape, and at least some of the leads are constructed to extend across the front-side surface of the die from one edge substantially to another edge, such as an adjacent or opposing edge. As a result, a substantial area of the front-side surface of the die is adhesively attachable to the leads through the tape, so the die is supportable in an IC package in an improved manner, and the heat may be conducted away from the die through the lead frame in an improved manner.
An integrated circuit package having an integrated circuit die and portions of a lead frame encapsulated therein for use on a printed circuit board for use in a computer comprising:
An integrated circuit package having an integrated circuit die and a lead frame having a reversible pin-out arrangement for use on a printed circuit board for use in a computer comprising:
An integrated circuit package having an integrated circuit die and a lead frame for use on a printed circuit board for use in a computer comprising:
An integrated circuit package having an integrated circuit die and a portion of a lead frame having a reversible pin-out arrangement, said integrated circuit package for use on a printed circuit board for use in a computer, the integrated circuit package comprising:
Dependencies are inferred from the claim text.
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Leadframes: shapes or dispositions
Chip-supporting parts, e.g. die pads: leadframe inner leads serving as die pads
Leadframes: specially adapted for cooling
On the same surface: die-attach connectors and bond wires
Term end not estimated
Field of the Invention: The present invention relates to interdigitated leads-over-chip lead frames and other devices and methods for supporting integrated circuit dice.
State of the Art: Integrated circuit (IC) dice or “chips” are small, generally rectangular IC devices cut from a semiconductor wafer, such as a silicon wafer, on which multiple IC's have been fabricated. Bare IC dice are typically packaged to protect them from corrosion by attaching them to a lead frame for support and heat conduction and then enclosing them in a die package.
Examples of conventional type lead frames having interdigitized lead frame strips and/or lead fingers thereon are illustrated in U.S. Pat. Nos. 4,949,161 and 5,147,815.
FIG. 1 is an isometric, cut-away view of a prior art integrated circuit (IC) die package having a Leads-Over-Chip (LOC) lead frame;
FIG. 1A is a top view of a prior art integrated circuit (IC) die package having a Leads-Over-Chip (LOC) lead frame;
FIG. 1B is a top view of a prior art integrated circuit (IC) die package having a Leads-Over-Chip (LOC) lead frame;
As shown in a cut-away view in FIG. 2, an inventive die package 20 includes a Leads-Over-Chip (LOC) lead frame 22 comprising an assembly of interdigitated leads 24 supported by a housing 26. A portion of each of the leads 24 extends across a front-side surface of an integrated circuit (IC) die 28 from one edge substantially to another, opposing edge in close proximity to adjacent leads 24 and adhesively attached to the front-side surface using double-sided adhesive tape 30 so the leads 24 together support the IC die 28 within the die package 20. Because the leads 24 extend substantially from edge to edge across the front-side surface of the IC die 28 in close proximity to one another, a substantial area of the front-side surface (e.g., 30% to 80% or more) is adhesively attached to the leads 24, so the IC die 28 is supported in an improved manner, and heat is conducted away from the IC die 28 through the lead frame 22 in an improved manner.
It will be understood by those having skill in the field of this invention that while the die package 20 is shown in FIG. 2 in the form of a Thin Small Outline Package (TSOP), the present invention is equally applicable to any die package including, for example, a Thin Quad Flat Pack (TQFP), a Small Outline J-lead (SOJ) package, a Plastic Leaded Chip Carrier (PLCC), and a Dual In-line Package (DIP). Also, although the leads 24 of the LOC lead frame 22 are shown in FIG. 2 having a particular shape and a particular arrangement with respect to one another, it will be understood that the present invention includes within its scope lead frame leads and other support members having any shape and any arrangement that extend substantially from edge to opposing edge across the front-side surface of an IC die in adhesive attachment therewith.
Further, it will be understood that the present invention includes within its scope any support members extending across an IC die as described, not just support members, such as the leads 24, that serve as conductors for an IC die. Still further, it will be understood that the IC die 28 may comprise any IC die, and that the double-sided adhesive tape 30 may comprise any adhesive tape for attaching the leads 24 to the front-side surface of the IC die 28. In addition, it will be understood that while all the leads 24 are shown in FIG. 2 extending substantially from edge to edge across the IC die 28, the present invention includes within its scope lead frames in which only some of the leads extend substantially from edge to edge across an IC die.