Dual double gate transistor and method for forming
AssigneeInternational Business Machines Corporation
InventorsDavid M. Fried, Edward J. Nowak
Life of this patent
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Abstract
The present invention provides a dual gate transistor and a method for forming the same that results in improved device performance and density. The present invention uses a double gate design to implement a dual gate transistor. A double gate is a gate which is formed on both sides of the transistor body. The present invention thus provides a transistor with two double gates in series that provide improved current control over traditional dual gate designs. The preferred embodiment of the present invention uses a fin type body with dual double-gates. In a fin type structure, the double gates are formed on each side of a thin fin shaped body, with the body being disposed horizontally between the gates.
Claims22
A semiconductor device comprising:
- a) a source, a drain and a body between the source and the drain, the body having a first side and a second side;
- b) a first double gate, the first double gate having a first portion adjacent to the body first side and a second portion adjacent to said body second side;
- c)a second double gate, the second double gate having a first portion adjacent to the body first side and a second portion adjacent to said body second side.
A method for forming a field effect transistor, the method comprising the steps of:
- a) providing a semiconductor substrate;
- b) patterning the semiconductor substrate to provide a body, the body having a first side and a second side;
- c) forming a first double gate, the first double gate having a first portion adjacent to the body first side and a second portion adjacent to said body second side;
- d) forming a second double gate, the second double gate having a first portion adjacent to the body first side and a second portion adjacent to the said body second side.
A transistor comprising:
- a) a fin body formed on a substrate, the fin body having a first vertical edge and a second vertical edge, and a first end and a second end;
- b) a source formed at the first end of the fin body, and a drain formed at the second end of the fin body;
- c) a first gate structure adjacent the transistor body first vertical edge and second vertical edge, the first gate structure approximate to the source;
- and
- d) a second gate structure adjacent the transistor body first vertical edge and second vertical edge, the second gate structure approximate to the drain.
Dependencies are inferred from the claim text.