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US 2003/0193063 A1Published application
Metal structure for a phase-change memory device
AssigneeIntel Corporation
InventorsChien Chiang, Jong-Won Lee, Patrick Klersy
Life of this patent
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Abstract
The invention relates to a damascene chalcogenide memory cell structure. The damascene chalcogenide memory cell structure is fabricated under conditions that simplify previous process flows. The damascene chalcogenide memory cell structure also prevents volatilization of the chalcogenide memory material.
Claims31
A process of forming a phase-change memory device comprising:
- providing a lower electrode having an upper surface;
- forming a dielectric layer over a lower electrode;
- forming a recess in the dielectric layer to expose the lower electrode upper surface;
- forming a phase-change material in the recess and in contact with the lower electrode upper surface;
- and
- filling the recess with an electrically conductive material.
3 more elements
A phase change memory cell comprising:
- a lower electrode disposed in a substrate, the lower electrode having an upper surface;
- a phase change memory material disposed in contact with the lower electrode upper surface;
- dielectric layer disposed over the substrate, the dielectric having an upper surface and a recess that communicates to the lower electrode upper surface;
- and
- a damascene upper electrode disposed in the recess and that fills the recess to the dielectric upper surface.
2 more elements
A memory array comprising:
- a plurality of memory cells;
- a row select line;
- a column select line;
- a lower electrode having an upper surface;
- an optional adhesion layer disposed over the lower electrode upper surface;
- a phase-change memory material;
- an optional barrier layer disposed over the phase change material, comprising
- a first barrier layer;
- and
- a second barrier layer;
- an upper electrode having an upper surface;
- and
- wherein the upper electrode has a damascene disposition in a dielectric layer, the dielectric layer having an upper surface and a recess that communicates to the lower electrode upper surface, and wherein the upper electrode fills the recess to the dielectric upper surface.
10 more elements
Dependencies are inferred from the claim text.