Programmable conductor memory cell structure and method therefor

#This invention relates generally to memory devices for integrated circuits and more particularly to an anode contact for a programmable conductor random access memory (PCRAM) cell.

#The digital memory chip most commonly used in computers and computer system components is the dynamic random access memory (DRAM), wherein voltage stored in capacitors represents digital bits of information. Electric power must be supplied to the capacitors to maintain the information because, without frequent refresh cycles, the stored charge dissipates, and the information is lost. Memories that require constant power are known as volatile memories.

#Non-volatile memories do not need frequent refresh cycles to preserve their stored information, so they consume less power than volatile memories. The information stays in the memory even when the power is turned off. There are many applications where non-volatile memories are preferred or required, such as in lap-top and palm-top computers, cell phones or control systems of automobiles. Non-volatile memories include magnetic random access memories (MRAMs), erasable programmable read only memories (EPROMs) and variations thereof.

#These and other aspects of the invention will be better understood from the description below and the appended drawings, which are meant to illustrate and not to limit the invention, and in which:

#FIG. 1a is a cross section of a partially fabricated programmable conductor memory cell for an integrated circuit, constructed in accordance with a preferred embodiment of the present invention.

#FIG. 1b is a perspective view of the partially fabricated programmable conductor memory cell of FIG. 1a.

#For proper functioning of a “programmable conductor” memory cell device, incorporating a glass electrolyte element with an adjustable conductivity, it is important that the conductive pathway growth in response to a particular applied voltage occurs reproducibly and consistently across an array. Low voltages cause slow growth, whereas higher voltages result in faster growth of the conductive path. The amount of growth in a given switching time depends, in part, on the availability of metal ions. Therefore, it is important that the cations come from a controlled source, such as from the solid solution of the cell body or glass electrolyte, which supplies an amount of cations proportional to the concentration therein and to the electric field. If additional cations are supplied from other, less reliable sources, the amount of cations may not be directly and reproducibly related to the strength of the electric field or switching time.

#For example, the interface between the cell body sidewall and the surrounding insulating layer can provide a diffusion path for metal atoms and ions. When a metal anode layer (e.g., silver) is in contact with the edge (shown in FIG. 1b as 115) of the cell body sidewall, i.e., where the sidewall makes contact with the anode surface, there is additional diffusion of metal cations along the sidewall, through the interface, to the growing conductive pathway. If the anode via is designed to have the same width as the cell body via, even slight variations in mask registration can result in large differences in the contact area between the anode and the edge of the cell body sidewall, regardless of conventional mechanisms to minimize the effect of mask misalignment. These differences in contact area lead to differences in the metal supply through the cell body/insulator interface to the growing conductive pathway. Thus, the extent of conductive pathway formation would depend not just on applied voltage and/or switching time, but also on the amount of metal leakage along the sidewall. Accordingly, the preferred embodiments provide means for avoiding differential contact area between the anode and the edge of the glass electrolyte element.

#A preferred embodiment of the current invention can be described beginning with reference to FIG. 1a, wherein the first components of a simplified programmable conductor memory cell for an integrated circuit are shown. A cathode layer 101, which is connected to the negative pole of a power supply, is shown. Preferably, the cathode layer 101 comprises tungsten (W). An insulating layer 103, preferably silicon nitride (Si3N4), is deposited over the cathode layer 101. In other arrangements, it will be understood that the thick planarized insulating layer 103 can comprise a form of silicon oxide, such as TEOS or BPSG, although it is preferred to define the sidewall with a material that prevents the diffusion of metal between devices. The thickness of the insulating layer 103 is preferably between about 10 nm and 200 nm, more preferably between about 25 nm and 100 nm and most preferably about 50 nm. A cell body via 105 is etched through the insulating layer 103, opening a window to the cathode layer 101, using standard patterning and etching techniques. The width of the cell body via 105 is preferably between about 100 nm and 500 nm, more preferably between about 200 nm and 300 nm, and most preferably about 250 nm. The cell body via 105 is filled with a glass electrolyte 107 (sometimes referred to in the literature as a Glass Fast Ion Diffusion or GFID element). The illustrated cell body preferably includes a chalcogenide glass, more preferably a glass comprising germanium and selenium (Ge—Se) and most preferably, Ge4Se6, Ge3Se7 or Ge2Se8, and additionally includes metal ions. The actual ratios of elements in the cell body 107 can vary and more complicated structures for the cell body 107 are also contemplated, one of which is illustrated in FIG. 1c and discussed below. Once the cell body via 105 is filled, the top surface 109 of the Ge—Se 107 is made level with the top surface 111 of the insulating layer 103, preferably by chemical mechanical planarization. Preferably the height of the programmable conductor memory cell body between the cathode surface and the anode surface is in the range of about 25 nm to 100 nm.