Cathode cartridge for electroplating tester
AssigneeYamamoto-MS Co., Ltd.
InventorWataru Yamamoto
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AssigneeYamamoto-MS Co., Ltd.
InventorWataru Yamamoto
Estimating the term…
A cathode cartridge N for an electroplating tester includes a cathode conductor 10 that conducts electricity to a surface Wa to be plated of a silicon wafer W as an object to be plated, a first insulator 20 that covers a front side (the surface Wa to be plated) of the silicon wafer W and holds the cathode conductor 10, and a second insulator 30 that covers a back side (reverse to the surface Wa to be plated) of the silicon wafer W and holds the silicon wafer W. Negative portions other than the surface Wa to be plated of the silicon wafer W are insulated from plating solution with a first O-ring 22 fitted in the first insulator 20 and a second O-ring 32 fitted in the second insulator 30.
A cathode cartridge for an electroplating tester comprising:
Dependencies are inferred from the claim text.
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Constructional parts, or assemblies thereof, of cells for electrolytic coating: apparatus specially adapted for electrolytic coating of wafers,…
Constructional parts, or assemblies thereof, of cells for electrolytic coating: suspending or supporting devices for articles to be coated
Electrodes , e.g. composition, counter electrode: shape or form
Processes for the electrolytic or electrophoretic production of coatings
Term end not estimated
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This invention relates generally to cathode cartridges for electroplating testers, and more particularly to a cathode cartridge for an electroplating tester, with which silicon wafers, glass substrates, ceramic substrates, or the like coated with a metal layer can be plated precisely.
In recent years, plating technique has extensively been used in various fields of technology, such as one which lends itself to wiring for semiconductor chips. In the field of semiconductor-related industries, fine-pitch wiring within and on the semiconductor chips is required for realizing high-density packaging and high performance of an electronic circuit. Among wiring methods that prevail recently, so-called the Damascene process is widely adopted. The Damascene process is a method in which a conductive material is embedded through a plating process into a channeled pattern of wiring formed through a dry etching process after forming an interlayer insulating film.
One of the latest applications of the plating technique, called LIGA (abbreviation of the German phrase, Lithographie Galvanoformung Abformung), is directed to manufacture of parts of micromachines. The LIGA forms a mold of an acrylic resin using X-rays, and thick metal plating is deposited in the mold, so that very small metal parts are molded.
FIG. 1 is an exploded perspective view of a cathode cartridge for an electroplating tester according to the present invention.
FIG. 2A is a front elevation of a cathode conductor as viewed from a second insulator.
FIG. 2B is a cross section of the cathode conductor taken along line A-A of FIG. 2A.
A detailed description of the preferred embodiments of the present invention will be given hereinafter with reference to the accompanying drawings. It is to be understood that the following description of the embodiments is based upon the premise that a silicon wafer having one surface thereof coated with a metal layer is used as an object to be plated and plating is applied to the metal layer.
A description will now be given of a construction of a cathode cartridge for an electroplating tester according to the present invention (hereinafter referred to simply as “cathode cartridge”). FIG. 1 is an exploded perspective view of the cathode cartridge.
As shown in FIG. 1, the cathode cartridge N includes a cathode conductor 10 that conducts electricity through a surface Wa to be plated of a silicon wafer W as an object to be plated, a first insulator 20 that covers the surface Wa to be plated (hereinafter referred to as “front side”) of the silicon wafer W to hold the cathode conductor 10, and a second insulator 30 that covers the reverse side of the surface Wa to be plated (hereinafter referred to as “back side”) of the silicon wafer W to hold the silicon wafer W. The silicon wafer W is laminar, and a laminar elastic body 40 is applied to the back side of the silicon wafer W. Each element will now be described in detail.