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US 2003/0192023 A1Published application
Apparatus and method for handling of multi-level circuit design data
AssigneeAtrenta, Inc.
InventorBernard Murphy
Life of this patent
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AssigneeAtrenta, Inc.
InventorBernard Murphy
Estimating the term…
A system and method for implementation of look-ahead design methodology. Efficient debugging of a design is accomplished by evaluating the high level register transfer level (RTL) representation of a device being designed by quickly simulating the downstream implementation of that device to expose potential implementation problems that would otherwise be found much later in the design or manufacturing cycle.
A system for look-ahead design analysis, the system comprising:
A method for look-ahead design analysis, the method comprising:
A computer software product for the purpose of look-ahead design analysis, the computer program product comprising:
A chip development system comprising:
A look-ahead design analysis mechanism comprising:
The look-ahead design analysis mechanism claim of 124, wherein said constraint database comprises at least one constraint rule.
The look-ahead design analysis mechanism of claim 1404, wherein said flat gate netlist design violation is reported to said means for structural design analysis.
Dependencies are inferred from the claim text.
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Design verification, e.g. functional simulation or model checking: using simulation
Computer-aided design [CAD]: circuit design
Circuit design at the digital level: design verification, e.g. functional simulation or model checking
Computing and data processing
Term end not estimated
1. Technical Field of the Present Invention
The present invention generally relates to the design automation of complex circuits to be integrated on a single semiconductor device. More specifically, the invention relates to the specific stages of semiconductor chip design tools and methodologies.
2. Description of the Related Art
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate the present invention and, together with the written description, serve to explain the aspects, advantages and principles of the present invention. In the drawings,
FIG. 1 is a diagram of a conventional design methodology flow;
FIG. 2 is an exemplary schematic block diagram of an embodiment of the invention;
Prior to describing the aspects of the present invention, some details concerning the prior art will be provided to facilitate the reader's understanding of the present invention and to set forth the meaning of various terms.
As used herein, the term “computer system” encompasses the widest possible meaning and includes, but is not limited to, standalone processors, networked processors, mainframe processors, and processors in a client/server relationship. The term “computer system” is to be understood to include at least a memory and a processor. In general, the memory will store, at one time or another, at least portions of executable program code, and the processor will execute one or more of the instructions included in that executable program code.
As used herein, the terms “predetermined operations,” the term “computer system software” and the term “executable code” mean substantially the same thing for the purposes of this description. It is not necessary to the practice of this invention that the memory and the processor be physically located in the same place. That is to say, it is foreseen that the processor and the memory might be in different physical pieces of equipment or even in geographically distinct locations.