Slack time analysis through latches on a circuit design
AssigneeMentor Graphics Corporation
InventorTruman Wesley Collins JR.
Life of this patent
Estimating the term…
Abstract
Slack times at an input of a latch in a circuit design are determined by determining a set of required times at the input of the latch, where the set of required times includes a required time entry for each different relationship between a signal comprising a downstream event and a clock signal for the latch. A set of arrival time entries at the input of the latch is also determined, each arrival time entry having a corresponding required time entry.
Claims33
A method for determining slack time for a node in a circuit design comprising:
- determining a starting point and an ending point for a path going through at least one latch;
- determining a set of required times for each node in the path by working upstream from the ending point;
- determining a set of arrival times for each node in the path by working downstream from the starting point;
- and
- calculating a slack time for each node in the path from the set of required times and the set of arrival times at each node.
A method for generating paths in a circuit design comprising:
- generating one or more paths at a starting point;
- extending the paths downstream;
- and
- reporting the paths that go through latches.
A method for determining slack time for a node in a circuit design comprising:
- determining on a first computer, a starting point and an ending point for a path going through at least one latch;
- transmitting the circuit design, the starting point, and the ending point to a second computer;
- on the second computer, determining a set of required times for each node in the path by working upstream from the ending point;
- on the second computer, determining a set of arrival times for each node in the path by working downstream from the starting point;
- on the second computer, calculating a slack time for each node in the path from the set of required times and the set of arrival times at each node;
- and
- transmitting the slack time for each node from the second computer to the first computer.
A method for determining slack time for a node in a circuit design comprising:
- determining a starting point and an ending point for a path going through at least one latch;
- calculating all of the different clock relationships from the node to the ending point;
- determining a reference clock edge for each clock relationship, where the reference clock edge is any edge of the clock at the ending point if a node is the first latch upstream of the ending point, or, if not, the reference clock edge is a specific clock edge relative to a preceding latch in the path;
- determining a required time, which is the last possible time a signal can arrive at the node and still make the timing requirements of the circuit, for each reference clock edge and constructing a set of required times corresponding to the set of reference clock edges;
- calculating for each node between the node and the ending point an open interval, which is a window of time where, if a signal arrives at the node during the interval, the signal will travel from the node to the ending point without hitting a closed latch;
- calculating an arrival interval, which is a time window stretching from the earliest to the latest possible time that a signal can arrive at a given point, at each node, for each clock relationship, along the path from the starting point to the ending point;
- calculating the slack time at each node by taking the difference between a required time and an arrival time for each pair of arrival and required times at a node to create a slack time for each pair, where the required time and the arrival time have a common clock reference, finding a worst slack time for the node by finding the worst of the slack times for all of the pairs of arrival and required times for the node, and using the worst slack time of the node as the slack time for the node.
Dependencies are inferred from the claim text.