Integrated circuit that is robust against circuit errors

#Defects are a major problem in digital integrated circuits. To avoid use of integrated circuits that generate erroneous signals, integrated circuits are extensively tested after manufacture and all integrated circuits that are found to be defective are discarded. Any small defect may cause the integrated circuit to generate erroneous digital signals. This problem increases as integrated circuits become more complex. Thus, testing and discarding increasingly raises the cost of integrated circuits, in terms of lost silicon and lost testing time. Moreover, testing does not prevent “soft” errors during use, for example due to alpha particles or excessive noise.

#For digital integrated memories, this problem is addressed by storing words in an error correcting code. When an error correcting code is used, not all possible binary words are stored in the memory, but only a subset of all possible words. The words in this subset are termed the words “in” the error correcting code. The words in the error correcting code differ from each other at least at “h” bit positions (h being at least three). When a word is read out of memory and it is not a word in the subset, the word is corrected to the word in the subset that differs at the least number of bit positions. Thus, the bit errors are corrected if the number of bit errors is less than h/2.

#This approach is limited to the correction of errors in words stored in a memory. Errors in an address decoder, for example, are not prevented in this way. Nor does this approach apply to “combinatorial logic” circuits, that is, circuits that logically compute an output signal from an input signal using some combinatorial logic function, rather than retrieving the entire signal from memory.

#These and other advantageous aspects of the invention will be described in more detail using the following figures.

#FIG. 1 shows a circuit with a correction circuit for correcting circuit errors

#FIG. 2 shows a two layer circuit with a correction circuit for correcting circuit errors

#FIG. 1 shows a circuit comprising a combinatorial logic circuit 10 with combinatorial logic functionality, a correction determination circuit 12 and a correction circuit 14 and a number of scan chain registers 17a-g. The combinatorial logic circuit 10 is made up of a number of independent sections (of which only a number 100a-g is shown explicitly for simplicity). The sections 100a-g have inputs coupled to a common input 11. The outputs of the sections together form a vector output interface 16 which is coupled to an input of the correction determination circuit 12 via scan chain registers 17a-g. The correction circuit 14 comprises correction sections (of which only three 140a,b,c are shown explicitly for simplicity). The number of sections 100a-g in the combinatorial logic circuit 10 is larger than number of correction sections 140a-d, to provide for redundancy that allows correction of errors. Outputs of a subset of the sections of the combinatorial logic circuit 10 are coupled to inputs of respective ones of the sections of the correction circuit 14. The correction determination circuit 12 has outputs coupled to respective ones of the correction sections 140a-d. The outputs of the sections 140a-d of the correction circuit 14 together form the output 18 of the circuit.

#The combinatorial logic circuit 10 has a complex input/output relation, realized by a considerable amount of circuitry, which is prone to suffer from manufacturing errors.

#In operation, the sections 100a-g of the combinatorial logic circuit 10 compute respective digital intermediate output bits. In one example, these output bits include “function” bits and “error correction” bits, computed by the sections 100a-d that are connected to the correction circuit 14 and by the remaining sections 100e-g respectively. The function bits are computed according to the I/O relation between the input 11 and the output 18, that is required of the circuit. The error correction bits are computed so that the output bits of the sections 100a-g together form a vector from an error correcting code. An error correcting code is defined in this example by the fact that the error correction bits correspond to a function of a vector made up of the function bits, the function being selected so that if two vectors differ at x (>0) bits, the corresponding vectors of error correction bits differ at least by 2*t+1−x bits (if x<2*t+1; otherwise, if x>=2*t+1, any error correction bits, including identical error correction bits may be used). “t”, here, is a positive integer representing the number of bit errors that can be corrected. Such functions of the function bits are known per se from the field of error correcting codes. For example, one may use a one bit (t=1) error correcting hamming code. More generally, an error correcting code is defined by the fact that any two vectors from the code are either identical or differ at at least 2*t+1 bits.