Method for verifying the accuracy of bit-map memory test programs
AssigneeWinbond Electronics Corp.
InventorsWen-Jyh Hung, Chien-Chiang Wang
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AssigneeWinbond Electronics Corp.
InventorsWen-Jyh Hung, Chien-Chiang Wang
Estimating the term…
A method for verifying the accuracy of bit-map memory test programs is disclosed, which employs a Focused Ion Beam (FIB) apparatus to make or break connections on one or more word lines or bit lines of the memory to be tested, causing abnormal data output from memory locations affected by such word lines or bit lines during FIB modeling. If abnormal data are also produced on the same electrical address corresponding to the physical memory address during the bit-map memory testing, that means the bit-mapping memory test program has passed the verification test, and it can be used to test other physical memory to check for any faulty address lines or memory cells; otherwise, the test program needs to be tuned through repeated correction process until the electrical addresses output from the test program match with the test pattern memory addresses.
A method for verifying the accuracy of bit-map memory test programs, the method comprising the steps of:
A method for verifying the accuracy of bit-map memory test programs, comprising the steps of:
Dependencies are inferred from the claim text.
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External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor: pattern generation
Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation: arrangements for designing test…
Static stores
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1. Field of the Invention
The present invention relates to a method for verifying the accuracy of bit-map memory test programs, especially a method that employs a Focused Ion Beam (FIB) apparatus to make or break connections of one or more word lines or bit lines of a physical memory. The FIB modeling result is then compared with that from the bit-map memory test program to verify whether the bit-map memory test program is reliable.
2. Description of Related Art
FIG. 1 is a logic diagram of the method for verification of bit-map memory test program in accordance with the present invention.
FIG. 2 is a conventional data representation in association with physical memory address.
FIG. 3 is another conventional representation for the same physical memory address.
With reference to FIG. 1, the method for verifying the accuracy of a bit-map memory test program in accordance with the present invention includes the steps of:
(i) preparing a normal memory chip and setting up a bit-map memory test program by loading specific test parameters based on the manufacturer's physical memory address;
(ii) making or breaking connections of specific address lines of the physical memory in accordance with a test pattern using Focused Ion Beam apparatus;