Software controllable register map
AssigneeSun Microsystems, Inc.
InventorDavid L. Weaver
Life of this patent
Estimating the term…
Abstract
Virtual registers are mapped to architectural or physical registers according to a register map that is configurable with software. In one embodiment, only privileged software can configure the register map. In another embodiment, a portion of the register map is configurable with non-privileged software, and another portion is only configurable with privileged software. In yet another embodiment the register map is fully configurable by user software. The configurable register map provides backwards compatibility to code written for hardware-defined register mapping, while allowing flexible approaches to register mapping in code generated for a processor architecture using a software controllable register map.
Claims26
A processor comprising:
- a central processing unit including
- a logic processor;
- a plurality of architectural registers;
- and
- a software-controllable register map configured to map virtual registers accessed by software running on the logic processor to the plurality of architectural registers.
A processor comprising:
- a central processing unit including
- a logic processor;
- a registry having a plurality of physical registers;
- a software-controllable register map configured to map virtual registers defined by non-privileged software running on the processor to architectural registers;
- and
- a register rename map disposed between the software-controllable register map and a physical register file array, the register rename map being unaccessible by the non-privileged software.
A method of operating a processor, the method comprising:
- providing a processor with a software-controllable register map and architectural registers;
- and
- configuring the software-controllable register map to map virtual registers in code to be executed by the processor to a first plurality of architectural registers of the processor.
A computer-readable medium having computer-executable instructions for performing a method on a processor having a software-controllable register map comprising:
- defining a first register mapping array in the software-controllable register map;
- and
- defining a second register mapping array in the software-controllable register map.
Dependencies are inferred from the claim text.