Memory system for multiple data types
AssigneeIntel Corporation
InventorsZeev Sperber, Guy Peled, Doron Orenstein, Ehud Cohen, Gabi Malka
Life of this patent
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Abstract
A memory system is provided for storing multiple data types. The memory system includes a main memory, a local cache, and a translation unit. The local cache has multiple entries, each of which includes a data field to store data and a status field to indicate a storage state for the stored data. The translation unit includes a translation lookaside buffer (TLB) and a status-cache (STC). The TLB stores address translations for data in the main memory, and the STC stores storage states for data indicated by the address translations.
Claims22
A memory system comprising:
- a main memory;
- a local cache having multiple entries, each entry including a data field to store data and a status field to indicate a storage state for the stored data;
- and
- a translation unit associated with the local cache, the translation unit including a translation lookaside buffer (TLB) and a status-cache (STC), the TLB to store address translations for data in the main memory and the STC to store storage states for data indicated by the address translations.
A cache system comprising:
- a tag RAM to store an index and a storage status for each entry of the cache;
- a data RAM to store data associated with the index;
- a hit/miss unit to determine whether data at a specified entry is available in the cache;
- and
- a TLB to provide an address translation and a storage status when the hit/miss unit indicates an access miss in the tag RAM.
A method comprising:
- storing a data block in a first entry of a cache;
- and
- storing a storage state for the data block in second entry associated with the first entry.
Dependencies are inferred from the claim text.